| Message ID | 6D39441BF12EF246A7ABCE6654B0235380B31A7A@HHMAIL01.hh.imgtec.org |
|---|---|
| State | New |
| Headers | show |
> -----Original Message----- > From: Matthew Fortune [mailto:Matthew.Fortune@imgtec.com] > Sent: Thursday, January 19, 2017 5:30 PM > To: Moore, Catherine <Catherine_Moore@mentor.com> > Cc: 'Aurelien Jarno' <aurelien@aurel32.net>; 'Richard Sandiford' > <rdsandiford@googlemail.com>; Loosemore, Sandra > <Sandra_Loosemore@mentor.com>; Yunqiang Su > <Yunqiang.Su@imgtec.com>; 'gcc-patches' <gcc-patches@gcc.gnu.org> > Subject: RE: [patch mips/gcc] add build-time and runtime options to > disable or set madd.fmt type > > Matthew Fortune <matthew.fortune@imgtec.com> writes: > > I've rewritten/simplified this patch as it provides far too much > control > > to end users who will undoubtedly shoot themselves in the foot so to > > speak. The option I intend to support is simply --with-madd4 -- > without-madd4 > > and -mmadd4 -mno-madd4. This is a simple enable/disable on top of > > architecture checks to use/not use the madd4 family of instructions. > > > > We have to keep each of these unusual features simple so that we > can somehow > > reason about them in the future. > > > > Here is the tested patch. Configure time default set/not set tested and > testsuite > fixes in place to deal with the fallout from running with the madd4 > instructions > disabled. Tests done with an o32 config on mips64el-linux-gnu. If > there is any > other fallout from other test configurations I'll catch those as I try to > get the > rest of the testsuite issues resolved before release. > > Catherine, any issues to raise on this new option? I committed this patch after fixing a couple of typos in the documentation and ChangeLog entry. No other objections. Catherine > > Thanks, > Matthew > > gcc/ > > * config.gcc (supported_defaults): Add madd4. > (with_madd4): Add validation. > (all_defaults): Add madd4. > * config/mips/mips.opt (mmadd4): New option. > * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a > default for > mmadd4. > (TARGET_CPU_CPP_BUILTINS): Add builtin_define for > __mips_no_madd4. > (ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4. > (ISA_HAS_FUSED_MADD4): Likewise. > * gcc/doc/invoke.texi (-mmadd4): Document the new option. > * doc/install.texi (--with-madd4): Document the new option. > > gcc/testsuite/ > > * gcc.target/mips/madd4-1.c: New file. > * gcc.target/mips/madd4-2.c: Likewise. > * gcc.target/mips/mips.exp (mips_option_groups): Add ghost > option > HAS_MADD4. > (mips_option_groups): Add -m[no-]madd4. > (mips-dg-init): Detect default -mno-madd4. > (mips-dg-options): Handle HAS_MADD4 arch > upgrade/downgrade. > * gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option. > * gcc.target/mips/mips-ps-type-2.c: Likewise. > * gcc.target/mips/nmadd-1.c: Likewise. > * gcc.target/mips/nmadd-2.c: Likewise. > * gcc.target/mips/nmadd-3.c: Likewise. > --- > gcc/ChangeLog | 16 ++++++++++++++++ > gcc/config.gcc | 19 +++++++++++++++++-- > gcc/config/mips/mips.h | 12 +++++++++--- > gcc/config/mips/mips.opt | 4 ++++ > gcc/doc/install.texi | 14 ++++++++++++++ > gcc/doc/invoke.texi | 8 +++++++- > gcc/testsuite/ChangeLog | 15 +++++++++++++++ > gcc/testsuite/gcc.target/mips/madd4-1.c | 14 ++++++++++++++ > gcc/testsuite/gcc.target/mips/madd4-2.c | 14 ++++++++++++++ > gcc/testsuite/gcc.target/mips/mips-ps-type-2.c | 2 +- > gcc/testsuite/gcc.target/mips/mips-ps-type.c | 2 +- > gcc/testsuite/gcc.target/mips/mips.exp | 12 +++++++++++- > gcc/testsuite/gcc.target/mips/nmadd-1.c | 2 +- > gcc/testsuite/gcc.target/mips/nmadd-2.c | 2 +- > gcc/testsuite/gcc.target/mips/nmadd-3.c | 2 +- > 15 files changed, 126 insertions(+), 12 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/mips/madd4-1.c > create mode 100644 gcc/testsuite/gcc.target/mips/madd4-2.c > > diff --git a/gcc/ChangeLog b/gcc/ChangeLog > index e53f9e1..7496071 100644 > --- a/gcc/ChangeLog > +++ b/gcc/ChangeLog > @@ -1,3 +1,19 @@ > +2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> > + Yunqiang Su <yunqiang.su@imgtec.com> > + > + * config.gcc (supported_defaults): Add madd4. > + (with_madd4): Add validation. > + (all_defaults): Add madd4. > + * config/mips/mips.opt (mmadd4): New option. > + * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a > default for > + mmadd4. > + (TARGET_CPU_CPP_BUILTINS): Add builtin_define for > + __mips_no_madd4. > + (ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4. > + (ISA_HAS_FUSED_MADD4): Likewise. > + * gcc/doc/invoke.texi (-mmadd4): Document the new option. > + * doc/install.texi (--with-madd4): Document the new option. > + > 2017-01-19 Chenghua Xu <paul.hua.gm@gmail.com> > > * config/mips/mips.h (ISA_HAS_FUSED_MADD4): Enable for > diff --git a/gcc/config.gcc b/gcc/config.gcc > index dd8c08c..9e67d36 100644 > --- a/gcc/config.gcc > +++ b/gcc/config.gcc > @@ -3940,7 +3940,7 @@ case "${target}" in > ;; > > mips*-*-*) > - supported_defaults="abi arch arch_32 arch_64 float > fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt > synci lxc1-sxc1" > + supported_defaults="abi arch arch_32 arch_64 float > fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt > synci lxc1-sxc1 madd4" > > case ${with_float} in > "" | soft | hard) > @@ -4078,6 +4078,21 @@ case "${target}" in > exit 1 > ;; > esac > + > + case ${with_madd4} in > + yes) > + with_madd4=madd4 > + ;; > + no) > + with_madd4=no-madd4 > + ;; > + "") > + ;; > + *) > + echo "Unknown madd4 type used in --with- > madd4" 1>&2 > + exit 1 > + ;; > + esac > ;; > > nds32*-*-*) > @@ -4511,7 +4526,7 @@ case ${target} in > esac > > t= > -all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune > tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 > divide llsc mips-plt synci tls lxc1-sxc1" > +all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune > tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 > divide llsc mips-plt synci tls lxc1-sxc1 madd4" > for option in $all_defaults > do > eval "val=\$with_"`echo $option | sed s/-/_/g` > diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h > index 81032c9..23e1672 100644 > --- a/gcc/config/mips/mips.h > +++ b/gcc/config/mips/mips.h > @@ -639,6 +639,8 @@ struct mips_cpu_info { > builtin_define ("__GCC_HAVE_BUILTIN_MIPS_CACHE"); > \ > if (!ISA_HAS_LXC1_SXC1) > \ > builtin_define ("__mips_no_lxc1_sxc1"); > \ > + if (!ISA_HAS_UNFUSED_MADD4 && !ISA_HAS_FUSED_MADD4) > \ > + builtin_define ("__mips_no_madd4"); > \ > } > \ > while (0) > > @@ -869,7 +871,8 @@ struct mips_cpu_info { > {"llsc", "%{!mllsc:%{!mno-llsc:-m%(VALUE)}}" }, \ > {"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \ > {"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }, > \ > - {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" } \ > + {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" }, \ > + {"madd4", "%{!mmadd4:%{!mno-madd4:-m%(VALUE)}}" } \ > > /* A spec that infers the: > -mnan=2008 setting from a -mips argument, > @@ -1066,11 +1069,14 @@ struct mips_cpu_info { > > /* ISA has 4 operand fused madd instructions of the form > 'd = [+-] (a * b [+-] c)'. */ > -#define ISA_HAS_FUSED_MADD4 (TARGET_MIPS8000 || > TARGET_LOONGSON_3A) > +#define ISA_HAS_FUSED_MADD4 (mips_madd4 > \ > + && (TARGET_MIPS8000 > \ > + || TARGET_LOONGSON_3A)) > > /* ISA has 4 operand unfused madd instructions of the form > 'd = [+-] (a * b [+-] c)'. */ > -#define ISA_HAS_UNFUSED_MADD4 (ISA_HAS_FP4 > \ > +#define ISA_HAS_UNFUSED_MADD4 (mips_madd4 > \ > + && ISA_HAS_FP4 > \ > && !TARGET_MIPS8000 > \ > && !TARGET_LOONGSON_3A) > > diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt > index 75ebafd..7c4b607 100644 > --- a/gcc/config/mips/mips.opt > +++ b/gcc/config/mips/mips.opt > @@ -392,6 +392,10 @@ mlxc1-sxc1 > Target Report Var(mips_lxc1_sxc1) Init(1) > Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable. > > +mmadd4 > +Target Report Var(mips_madd4) Init(1) > +Use 4-operand madd.s/madd.d and related instructions where > applicable. > + > mtune= > Target RejectNegative Joined Var(mips_tune_option) ToLower > Enum(mips_arch_opt_value) > -mtune=PROCESSOR Optimize the output for PROCESSOR. > diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi > index 712b82a..e2ff308 100644 > --- a/gcc/doc/install.texi > +++ b/gcc/doc/install.texi > @@ -1394,6 +1394,20 @@ in @code{lwxc1} type instructions. This > assumption holds true in a > pure 32-bit environment and can hold true in a 64-bit environment if > the address space is accurately set to be 32-bit for o32 and n32. > > +@item --with-madd4 > +On MIPS targets, make @option{-mmadd4} the default when no > +@option{-mno-madd4} option is passed. This is the default. > + > +@item --without-madd4 > +On MIPS targets, make @option{-mno-madd4} the default when no > +@option{-mmadd4} option is passed. The @code{madd4} instruction > +family can be problematic when targetting a combination of cores > that > +implement these instructions differently. There are two known cores > +that implemeent these as fused operations instead of unfused > (where > +unfused is normally expected). Disabling these instructions is the > +only way to ensure compatible code is generated; this will incur > +a performance penalty. > + > @item --with-mips-plt > On MIPS targets, make use of copy relocations and PLTs. > These features are extensions to the traditional > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > index 2d2976b..c04f415 100644 > --- a/gcc/doc/invoke.texi > +++ b/gcc/doc/invoke.texi > @@ -909,7 +909,7 @@ Objective-C and Objective-C++ Dialects}. > -mcompact-branches=@var{policy} @gol > -mfp-exceptions -mno-fp-exceptions @gol > -mvr4130-align -mno-vr4130-align -msynci -mno-synci @gol > --mlxc1-sxc1 -mno-lxc1-sxc1 @gol > +-mlxc1-sxc1 -mno-lxc1-sxc1 -mmadd4 -mno-madd4 @gol > -mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address @gol > -mframe-header-opt -mno-frame-header-opt} > > @@ -19939,6 +19939,12 @@ This optimization is off by default at all > optimization levels. > When applicable, enable (disable) the generation of @code{lwxc1}, > @code{swxc1}, @code{ldxc1}, @code{sdxc1} instructions. Enabled by > default. > > +@item -mmadd4 > +@itemx -mno-madd4 > +@opindex mmadd4 > +When applicable, enable (disable) the generation of 4-operand > @code{madd.s}, > +@code{madd.d} and related instructions. Enabled by default. > + > @end table > > @node MMIX Options > diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog > index 0ba8f93..34f15bb 100644 > --- a/gcc/testsuite/ChangeLog > +++ b/gcc/testsuite/ChangeLog > @@ -1,5 +1,20 @@ > 2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> > > + * gcc.target/mips/madd4-1.c: New file. > + * gcc.target/mips/madd4-2.c: Likewise. > + * gcc.target/mips/mips.exp (mips_option_groups): Add ghost > option > + HAS_MADD4. > + (mips_option_groups): Add -m[no-]madd4. > + (mips-dg-init): Detect default -mno-madd4. > + (mips-dg-options): Handle HAS_MADD4 arch > upgrade/downgrade. > + * gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option. > + * gcc.target/mips/mips-ps-type-2.c: Likewise. > + * gcc.target/mips/nmadd-1.c: Likewise. > + * gcc.target/mips/nmadd-2.c: Likewise. > + * gcc.target/mips/nmadd-3.c: Likewise. > + > +2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> > + > PR target/78176 > * gcc.target/mips/lxc1-sxc1-1.c: New file. > * gcc.target/mips/lxc1-sxc1-2.c: Likewise. > diff --git a/gcc/testsuite/gcc.target/mips/madd4-1.c > b/gcc/testsuite/gcc.target/mips/madd4-1.c > new file mode 100644 > index 0000000..d0dee36 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/mips/madd4-1.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-options "-ffast-math -mno-madd4 (HAS_MADD4) -mhard- > float" } */ > +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ > +/* { dg-final { scan-assembler-not "\tmadd.s\t" } } */ > + > +#ifndef __mips_no_madd4 > +#error missing definition of __mips_no_madd4 > +#endif > + > +NOMIPS16 float > +madd4 (float f, float g, float h) > +{ > + return (f * g) + h; > +} > diff --git a/gcc/testsuite/gcc.target/mips/madd4-2.c > b/gcc/testsuite/gcc.target/mips/madd4-2.c > new file mode 100644 > index 0000000..eb83023 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/mips/madd4-2.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-options "-ffast-math -mmadd4 (HAS_MADD4) -mhard-float" } > */ > +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ > +/* { dg-final { scan-assembler "\tmadd.s\t" } } */ > + > +#ifdef __mips_no_madd4 > +#error unexpected definition of __mips_no_madd4 > +#endif > + > +NOMIPS16 float > +madd4 (float f, float g, float h) > +{ > + return (f * g) + h; > +} > diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c > b/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c > index 6aba815..fecc35b 100644 > --- a/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c > +++ b/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c > @@ -1,7 +1,7 @@ > /* Test v2sf calculations. The nmadd and nmsub patterns need > -ffinite-math-only. */ > /* { dg-do compile } */ > -/* { dg-options "(HAS_MADDPS) -mgp32 -mpaired-single -ffinite- > math-only forbid_cpu=octeon.*" } */ > +/* { dg-options "(HAS_MADDPS) -mmadd4 -mgp32 -mpaired-single - > ffinite-math-only forbid_cpu=octeon.*" } */ > /* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" > } } */ > /* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */ > /* { dg-final { scan-assembler "\tmov.ps\t" } } */ > diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-type.c > b/gcc/testsuite/gcc.target/mips/mips-ps-type.c > index 454ffc3..d74d4b5 100644 > --- a/gcc/testsuite/gcc.target/mips/mips-ps-type.c > +++ b/gcc/testsuite/gcc.target/mips/mips-ps-type.c > @@ -1,7 +1,7 @@ > /* Test v2sf calculations. The nmadd and nmsub patterns need > -ffinite-math-only. */ > /* { dg-do compile } */ > -/* { dg-options "-mpaired-single -mgp64 -ffinite-math-only > forbid_cpu=octeon.*" } */ > +/* { dg-options "-mpaired-single -mmadd4 -mgp64 -ffinite-math-only > forbid_cpu=octeon.*" } */ > /* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" > } } */ > /* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */ > /* { dg-final { scan-assembler "\tmov.ps\t" } } */ > diff --git a/gcc/testsuite/gcc.target/mips/mips.exp > b/gcc/testsuite/gcc.target/mips/mips.exp > index 5296a15f..78fbba0 100644 > --- a/gcc/testsuite/gcc.target/mips/mips.exp > +++ b/gcc/testsuite/gcc.target/mips/mips.exp > @@ -256,6 +256,7 @@ set mips_option_groups { > ldc "HAS_LDC" > movn "HAS_MOVN" > madd "HAS_MADD" > + madd4_ghost "HAS_MADD4" > maddps "HAS_MADDPS" > lsa "(|!)HAS_LSA" > lxc1 "HAS_LXC1" > @@ -284,6 +285,7 @@ foreach option { > local-sdata > long-calls > lxc1-sxc1 > + madd4 > paired-single > plt > shared > @@ -863,6 +865,12 @@ proc mips-dg-init {} { > "-mlxc1-sxc1" > #endif > > + #ifdef __mips_no_madd4 > + "-mno-madd4" > + #else > + "-mmadd4" > + #endif > + > #ifdef __mips_synci > "-msynci", > #else > @@ -1182,6 +1190,7 @@ proc mips-dg-options { args } { > # > } elseif { $isa < 4 > && ([mips_have_test_option_p options "HAS_LXC1"] > + || [mips_have_test_option_p options > "HAS_MADD4"] > || [mips_have_test_option_p options > "HAS_MOVN"]) } { > mips_make_test_option options "-mips4" > # We need MIPS III or higher for: > @@ -1224,8 +1233,9 @@ proc mips-dg-options { args } { > || [mips_have_test_option_p options "-mfix- > r10000"] > || [mips_have_test_option_p options > "NOT_HAS_DMUL"] > || [mips_have_test_option_p options "HAS_LXC1"] > - || [mips_have_test_option_p options > "HAS_MOVN"] > || [mips_have_test_option_p options > "HAS_MADD"] > + || [mips_have_test_option_p options > "HAS_MADD4"] > + || [mips_have_test_option_p options > "HAS_MOVN"] > || [mips_have_test_option_p options "-mpaired- > single"] > || [mips_have_test_option_p options "- > mnan=legacy"] > || [mips_have_test_option_p options "- > mabs=legacy"] > diff --git a/gcc/testsuite/gcc.target/mips/nmadd-1.c > b/gcc/testsuite/gcc.target/mips/nmadd-1.c > index 00be144..746fbbb 100644 > --- a/gcc/testsuite/gcc.target/mips/nmadd-1.c > +++ b/gcc/testsuite/gcc.target/mips/nmadd-1.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > -/* { dg-options "-ffast-math isa=4 -mhard-float" } */ > +/* { dg-options "-ffast-math -mmadd4 isa=4 -mhard-float" } */ > /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ > /* { dg-final { scan-assembler "\tnmadd.s\t" } } */ > /* { dg-final { scan-assembler "\tnmadd.d\t" } } */ > diff --git a/gcc/testsuite/gcc.target/mips/nmadd-2.c > b/gcc/testsuite/gcc.target/mips/nmadd-2.c > index a271f33..4c8dd65 100644 > --- a/gcc/testsuite/gcc.target/mips/nmadd-2.c > +++ b/gcc/testsuite/gcc.target/mips/nmadd-2.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > -/* { dg-options "-fno-fast-math -ffinite-math-only isa=4 -mhard-float" > } */ > +/* { dg-options "-fno-fast-math -ffinite-math-only -mmadd4 isa=4 - > mhard-float" } */ > /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ > /* { dg-final { scan-assembler "\tnmadd.s\t" } } */ > /* { dg-final { scan-assembler "\tnmadd.d\t" } } */ > diff --git a/gcc/testsuite/gcc.target/mips/nmadd-3.c > b/gcc/testsuite/gcc.target/mips/nmadd-3.c > index 85de518..b55de96 100644 > --- a/gcc/testsuite/gcc.target/mips/nmadd-3.c > +++ b/gcc/testsuite/gcc.target/mips/nmadd-3.c > @@ -1,7 +1,7 @@ > /* The same code as nmadd-2.c, but compiled with -fno-finite-math- > only. > We can't use nmadd and nmsub in that case. */ > /* { dg-do compile } */ > -/* { dg-options "-fno-fast-math -fno-finite-math-only isa=4 -mhard- > float" } */ > +/* { dg-options "-fno-fast-math -fno-finite-math-only -mmadd4 isa=4 > -mhard-float" } */ > /* { dg-final { scan-assembler-not "\tnmadd" } } */ > /* { dg-final { scan-assembler-not "\tnmsub" } } */ > > -- > 2.2.1
Moore, Catherine <Catherine_Moore@mentor.com> writes: > > -----Original Message----- > > From: Matthew Fortune [mailto:Matthew.Fortune@imgtec.com] > > Sent: Thursday, January 19, 2017 5:30 PM > > To: Moore, Catherine <Catherine_Moore@mentor.com> > > Cc: 'Aurelien Jarno' <aurelien@aurel32.net>; 'Richard Sandiford' > > <rdsandiford@googlemail.com>; Loosemore, Sandra > > <Sandra_Loosemore@mentor.com>; Yunqiang Su > > <Yunqiang.Su@imgtec.com>; 'gcc-patches' <gcc-patches@gcc.gnu.org> > > Subject: RE: [patch mips/gcc] add build-time and runtime options to > > disable or set madd.fmt type > > > > Matthew Fortune <matthew.fortune@imgtec.com> writes: > > > I've rewritten/simplified this patch as it provides far too much > > control > > > to end users who will undoubtedly shoot themselves in the foot so to > > > speak. The option I intend to support is simply --with-madd4 -- > > without-madd4 > > > and -mmadd4 -mno-madd4. This is a simple enable/disable on top of > > > architecture checks to use/not use the madd4 family of instructions. > > > > > > We have to keep each of these unusual features simple so that we > > can somehow > > > reason about them in the future. > > > > > > > Here is the tested patch. Configure time default set/not set tested and > > testsuite > > fixes in place to deal with the fallout from running with the madd4 > > instructions > > disabled. Tests done with an o32 config on mips64el-linux-gnu. If > > there is any > > other fallout from other test configurations I'll catch those as I try to > > get the > > rest of the testsuite issues resolved before release. > > > > Catherine, any issues to raise on this new option? > > I committed this patch after fixing a couple of typos in the documentation and ChangeLog > entry. > No other objections. > Catherine Thanks Catherine. I'll check to see what if/any documentation changes have gone in without your review and send you a list in case you have time to review it before release. Thanks, Matthew
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e53f9e1..7496071 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> + Yunqiang Su <yunqiang.su@imgtec.com> + + * config.gcc (supported_defaults): Add madd4. + (with_madd4): Add validation. + (all_defaults): Add madd4. + * config/mips/mips.opt (mmadd4): New option. + * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for + mmadd4. + (TARGET_CPU_CPP_BUILTINS): Add builtin_define for + __mips_no_madd4. + (ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4. + (ISA_HAS_FUSED_MADD4): Likewise. + * gcc/doc/invoke.texi (-mmadd4): Document the new option. + * doc/install.texi (--with-madd4): Document the new option. + 2017-01-19 Chenghua Xu <paul.hua.gm@gmail.com> * config/mips/mips.h (ISA_HAS_FUSED_MADD4): Enable for diff --git a/gcc/config.gcc b/gcc/config.gcc index dd8c08c..9e67d36 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -3940,7 +3940,7 @@ case "${target}" in ;; mips*-*-*) - supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1" + supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4" case ${with_float} in "" | soft | hard) @@ -4078,6 +4078,21 @@ case "${target}" in exit 1 ;; esac + + case ${with_madd4} in + yes) + with_madd4=madd4 + ;; + no) + with_madd4=no-madd4 + ;; + "") + ;; + *) + echo "Unknown madd4 type used in --with-madd4" 1>&2 + exit 1 + ;; + esac ;; nds32*-*-*) @@ -4511,7 +4526,7 @@ case ${target} in esac t= -all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1" +all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4" for option in $all_defaults do eval "val=\$with_"`echo $option | sed s/-/_/g` diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 81032c9..23e1672 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -639,6 +639,8 @@ struct mips_cpu_info { builtin_define ("__GCC_HAVE_BUILTIN_MIPS_CACHE"); \ if (!ISA_HAS_LXC1_SXC1) \ builtin_define ("__mips_no_lxc1_sxc1"); \ + if (!ISA_HAS_UNFUSED_MADD4 && !ISA_HAS_FUSED_MADD4) \ + builtin_define ("__mips_no_madd4"); \ } \ while (0) @@ -869,7 +871,8 @@ struct mips_cpu_info { {"llsc", "%{!mllsc:%{!mno-llsc:-m%(VALUE)}}" }, \ {"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \ {"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }, \ - {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" } \ + {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" }, \ + {"madd4", "%{!mmadd4:%{!mno-madd4:-m%(VALUE)}}" } \ /* A spec that infers the: -mnan=2008 setting from a -mips argument, @@ -1066,11 +1069,14 @@ struct mips_cpu_info { /* ISA has 4 operand fused madd instructions of the form 'd = [+-] (a * b [+-] c)'. */ -#define ISA_HAS_FUSED_MADD4 (TARGET_MIPS8000 || TARGET_LOONGSON_3A) +#define ISA_HAS_FUSED_MADD4 (mips_madd4 \ + && (TARGET_MIPS8000 \ + || TARGET_LOONGSON_3A)) /* ISA has 4 operand unfused madd instructions of the form 'd = [+-] (a * b [+-] c)'. */ -#define ISA_HAS_UNFUSED_MADD4 (ISA_HAS_FP4 \ +#define ISA_HAS_UNFUSED_MADD4 (mips_madd4 \ + && ISA_HAS_FP4 \ && !TARGET_MIPS8000 \ && !TARGET_LOONGSON_3A) diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index 75ebafd..7c4b607 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -392,6 +392,10 @@ mlxc1-sxc1 Target Report Var(mips_lxc1_sxc1) Init(1) Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable. +mmadd4 +Target Report Var(mips_madd4) Init(1) +Use 4-operand madd.s/madd.d and related instructions where applicable. + mtune= Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value) -mtune=PROCESSOR Optimize the output for PROCESSOR. diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 712b82a..e2ff308 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -1394,6 +1394,20 @@ in @code{lwxc1} type instructions. This assumption holds true in a pure 32-bit environment and can hold true in a 64-bit environment if the address space is accurately set to be 32-bit for o32 and n32. +@item --with-madd4 +On MIPS targets, make @option{-mmadd4} the default when no +@option{-mno-madd4} option is passed. This is the default. + +@item --without-madd4 +On MIPS targets, make @option{-mno-madd4} the default when no +@option{-mmadd4} option is passed. The @code{madd4} instruction +family can be problematic when targetting a combination of cores that +implement these instructions differently. There are two known cores +that implemeent these as fused operations instead of unfused (where +unfused is normally expected). Disabling these instructions is the +only way to ensure compatible code is generated; this will incur +a performance penalty. + @item --with-mips-plt On MIPS targets, make use of copy relocations and PLTs. These features are extensions to the traditional diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 2d2976b..c04f415 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -909,7 +909,7 @@ Objective-C and Objective-C++ Dialects}. -mcompact-branches=@var{policy} @gol -mfp-exceptions -mno-fp-exceptions @gol -mvr4130-align -mno-vr4130-align -msynci -mno-synci @gol --mlxc1-sxc1 -mno-lxc1-sxc1 @gol +-mlxc1-sxc1 -mno-lxc1-sxc1 -mmadd4 -mno-madd4 @gol -mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address @gol -mframe-header-opt -mno-frame-header-opt} @@ -19939,6 +19939,12 @@ This optimization is off by default at all optimization levels. When applicable, enable (disable) the generation of @code{lwxc1}, @code{swxc1}, @code{ldxc1}, @code{sdxc1} instructions. Enabled by default. +@item -mmadd4 +@itemx -mno-madd4 +@opindex mmadd4 +When applicable, enable (disable) the generation of 4-operand @code{madd.s}, +@code{madd.d} and related instructions. Enabled by default. + @end table @node MMIX Options diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0ba8f93..34f15bb 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,20 @@ 2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> + * gcc.target/mips/madd4-1.c: New file. + * gcc.target/mips/madd4-2.c: Likewise. + * gcc.target/mips/mips.exp (mips_option_groups): Add ghost option + HAS_MADD4. + (mips_option_groups): Add -m[no-]madd4. + (mips-dg-init): Detect default -mno-madd4. + (mips-dg-options): Handle HAS_MADD4 arch upgrade/downgrade. + * gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option. + * gcc.target/mips/mips-ps-type-2.c: Likewise. + * gcc.target/mips/nmadd-1.c: Likewise. + * gcc.target/mips/nmadd-2.c: Likewise. + * gcc.target/mips/nmadd-3.c: Likewise. + +2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com> + PR target/78176 * gcc.target/mips/lxc1-sxc1-1.c: New file. * gcc.target/mips/lxc1-sxc1-2.c: Likewise. diff --git a/gcc/testsuite/gcc.target/mips/madd4-1.c b/gcc/testsuite/gcc.target/mips/madd4-1.c new file mode 100644 index 0000000..d0dee36 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/madd4-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-ffast-math -mno-madd4 (HAS_MADD4) -mhard-float" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ +/* { dg-final { scan-assembler-not "\tmadd.s\t" } } */ + +#ifndef __mips_no_madd4 +#error missing definition of __mips_no_madd4 +#endif + +NOMIPS16 float +madd4 (float f, float g, float h) +{ + return (f * g) + h; +} diff --git a/gcc/testsuite/gcc.target/mips/madd4-2.c b/gcc/testsuite/gcc.target/mips/madd4-2.c new file mode 100644 index 0000000..eb83023 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/madd4-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-ffast-math -mmadd4 (HAS_MADD4) -mhard-float" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ +/* { dg-final { scan-assembler "\tmadd.s\t" } } */ + +#ifdef __mips_no_madd4 +#error unexpected definition of __mips_no_madd4 +#endif + +NOMIPS16 float +madd4 (float f, float g, float h) +{ + return (f * g) + h; +} diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c b/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c index 6aba815..fecc35b 100644 --- a/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c +++ b/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c @@ -1,7 +1,7 @@ /* Test v2sf calculations. The nmadd and nmsub patterns need -ffinite-math-only. */ /* { dg-do compile } */ -/* { dg-options "(HAS_MADDPS) -mgp32 -mpaired-single -ffinite-math-only forbid_cpu=octeon.*" } */ +/* { dg-options "(HAS_MADDPS) -mmadd4 -mgp32 -mpaired-single -ffinite-math-only forbid_cpu=octeon.*" } */ /* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" } } */ /* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */ /* { dg-final { scan-assembler "\tmov.ps\t" } } */ diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-type.c b/gcc/testsuite/gcc.target/mips/mips-ps-type.c index 454ffc3..d74d4b5 100644 --- a/gcc/testsuite/gcc.target/mips/mips-ps-type.c +++ b/gcc/testsuite/gcc.target/mips/mips-ps-type.c @@ -1,7 +1,7 @@ /* Test v2sf calculations. The nmadd and nmsub patterns need -ffinite-math-only. */ /* { dg-do compile } */ -/* { dg-options "-mpaired-single -mgp64 -ffinite-math-only forbid_cpu=octeon.*" } */ +/* { dg-options "-mpaired-single -mmadd4 -mgp64 -ffinite-math-only forbid_cpu=octeon.*" } */ /* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" } } */ /* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */ /* { dg-final { scan-assembler "\tmov.ps\t" } } */ diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp index 5296a15f..78fbba0 100644 --- a/gcc/testsuite/gcc.target/mips/mips.exp +++ b/gcc/testsuite/gcc.target/mips/mips.exp @@ -256,6 +256,7 @@ set mips_option_groups { ldc "HAS_LDC" movn "HAS_MOVN" madd "HAS_MADD" + madd4_ghost "HAS_MADD4" maddps "HAS_MADDPS" lsa "(|!)HAS_LSA" lxc1 "HAS_LXC1" @@ -284,6 +285,7 @@ foreach option { local-sdata long-calls lxc1-sxc1 + madd4 paired-single plt shared @@ -863,6 +865,12 @@ proc mips-dg-init {} { "-mlxc1-sxc1" #endif + #ifdef __mips_no_madd4 + "-mno-madd4" + #else + "-mmadd4" + #endif + #ifdef __mips_synci "-msynci", #else @@ -1182,6 +1190,7 @@ proc mips-dg-options { args } { # } elseif { $isa < 4 && ([mips_have_test_option_p options "HAS_LXC1"] + || [mips_have_test_option_p options "HAS_MADD4"] || [mips_have_test_option_p options "HAS_MOVN"]) } { mips_make_test_option options "-mips4" # We need MIPS III or higher for: @@ -1224,8 +1233,9 @@ proc mips-dg-options { args } { || [mips_have_test_option_p options "-mfix-r10000"] || [mips_have_test_option_p options "NOT_HAS_DMUL"] || [mips_have_test_option_p options "HAS_LXC1"] - || [mips_have_test_option_p options "HAS_MOVN"] || [mips_have_test_option_p options "HAS_MADD"] + || [mips_have_test_option_p options "HAS_MADD4"] + || [mips_have_test_option_p options "HAS_MOVN"] || [mips_have_test_option_p options "-mpaired-single"] || [mips_have_test_option_p options "-mnan=legacy"] || [mips_have_test_option_p options "-mabs=legacy"] diff --git a/gcc/testsuite/gcc.target/mips/nmadd-1.c b/gcc/testsuite/gcc.target/mips/nmadd-1.c index 00be144..746fbbb 100644 --- a/gcc/testsuite/gcc.target/mips/nmadd-1.c +++ b/gcc/testsuite/gcc.target/mips/nmadd-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-ffast-math isa=4 -mhard-float" } */ +/* { dg-options "-ffast-math -mmadd4 isa=4 -mhard-float" } */ /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ /* { dg-final { scan-assembler "\tnmadd.s\t" } } */ /* { dg-final { scan-assembler "\tnmadd.d\t" } } */ diff --git a/gcc/testsuite/gcc.target/mips/nmadd-2.c b/gcc/testsuite/gcc.target/mips/nmadd-2.c index a271f33..4c8dd65 100644 --- a/gcc/testsuite/gcc.target/mips/nmadd-2.c +++ b/gcc/testsuite/gcc.target/mips/nmadd-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-fno-fast-math -ffinite-math-only isa=4 -mhard-float" } */ +/* { dg-options "-fno-fast-math -ffinite-math-only -mmadd4 isa=4 -mhard-float" } */ /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ /* { dg-final { scan-assembler "\tnmadd.s\t" } } */ /* { dg-final { scan-assembler "\tnmadd.d\t" } } */ diff --git a/gcc/testsuite/gcc.target/mips/nmadd-3.c b/gcc/testsuite/gcc.target/mips/nmadd-3.c index 85de518..b55de96 100644 --- a/gcc/testsuite/gcc.target/mips/nmadd-3.c +++ b/gcc/testsuite/gcc.target/mips/nmadd-3.c @@ -1,7 +1,7 @@ /* The same code as nmadd-2.c, but compiled with -fno-finite-math-only. We can't use nmadd and nmsub in that case. */ /* { dg-do compile } */ -/* { dg-options "-fno-fast-math -fno-finite-math-only isa=4 -mhard-float" } */ +/* { dg-options "-fno-fast-math -fno-finite-math-only -mmadd4 isa=4 -mhard-float" } */ /* { dg-final { scan-assembler-not "\tnmadd" } } */ /* { dg-final { scan-assembler-not "\tnmsub" } } */