From patchwork Sun Feb 7 02:19:46 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siarhei Siamashka X-Patchwork-Id: 71721 X-Patchwork-Delegate: s-paulraj@ti.com Return-Path: X-Original-To: wd@gemini.denx.de Delivered-To: wd@gemini.denx.de Received: from diddl.denx.de (diddl.denx.de [10.0.0.6]) by gemini.denx.de (Postfix) with ESMTP id 62BC73F6CD for ; Sun, 7 Feb 2010 03:30:12 +0100 (CET) Received: from diddl.denx.de (localhost.localdomain [127.0.0.1]) by diddl.denx.de (Postfix) with ESMTP id 362FBC8C5CB4 for ; Sun, 7 Feb 2010 03:30:12 +0100 (CET) Received: from pop.mnet-online.de by diddl.denx.de with POP3 (fetchmail-6.3.9) for (single-drop); Sun, 07 Feb 2010 03:30:12 +0100 (CET) Received: from murder (svr19.m-online.net [192.168.3.147]) by backend2 (Cyrus v2.2.12) with LMTPA; Sun, 07 Feb 2010 03:28:22 +0100 X-Sieve: CMU Sieve 2.2 Received: from mail.m-online.net (localhost [127.0.0.1]) by frontend3.pop.m-online.net (Cyrus v2.2.13) with LMTPA; Sun, 07 Feb 2010 03:28:21 +0100 Received: from scanner-2.m-online.net (unknown [192.168.8.166]) by mail.m-online.net (Postfix) with ESMTP id AC0742000A6; Sun, 7 Feb 2010 03:28:21 +0100 (CET) Received: from mxin-2.m-online.net ([192.168.1.21]) by scanner-2.m-online.net (scanner-2.m-online.net [192.168.8.166]) (amavisd-new, port 10026) with ESMTP id 15867-09; Sun, 7 Feb 2010 03:28:20 +0100 (CET) Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by mxin-2.m-online.net (Postfix) with ESMTP id 1597246C0B1; Sun, 7 Feb 2010 03:28:19 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ED745280D6; Sun, 7 Feb 2010 03:28:18 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id plV5L5QAA32R; Sun, 7 Feb 2010 03:28:18 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1FEE5280C7; Sun, 7 Feb 2010 03:28:14 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1E6F5280C1 for ; Sun, 7 Feb 2010 03:28:11 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yf1zcYtdxKIz for ; Sun, 7 Feb 2010 03:28:09 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-fx0-f210.google.com (mail-fx0-f210.google.com [209.85.220.210]) by theia.denx.de (Postfix) with ESMTP id 096F5280B4 for ; Sun, 7 Feb 2010 03:28:07 +0100 (CET) Received: by fxm2 with SMTP id 2so108059fxm.11 for ; Sat, 06 Feb 2010 18:28:07 -0800 (PST) Received: by 10.223.95.74 with SMTP id c10mr2578216fan.82.1265509220659; Sat, 06 Feb 2010 18:20:20 -0800 (PST) Received: from localhost.localdomain (a88-112-120-50.elisa-laajakaista.fi [88.112.120.50]) by mx.google.com with ESMTPS id 12sm4529264fks.39.2010.02.06.18.20.19 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sat, 06 Feb 2010 18:20:19 -0800 (PST) From: Siarhei Siamashka To: u-boot@lists.denx.de Date: Sun, 7 Feb 2010 04:19:46 +0200 Message-Id: <1265509186-14826-2-git-send-email-siarhei.siamashka@gmail.com> X-Mailer: git-send-email 1.6.4.4 In-Reply-To: <1265509186-14826-1-git-send-email-siarhei.siamashka@gmail.com> References: <1265509186-14826-1-git-send-email-siarhei.siamashka@gmail.com> Subject: [U-Boot] [PATCH] OMAP3: remove useless ASA bit from AUXCR X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de X-Virus-Scanned: by amavisd-new at m-online.net Setting ASA bit hurts performance for the code which has lots of I-cache misses and there are no Cortex-A8 errata workarounds which would require to have it. A test program which intentionally stresses I-cache misses on conditional branches is attached. ASA bit is not set: real 0m2.940s user 0m2.930s sys 0m0.008s ASA bit is set: real 0m3.470s user 0m3.461s sys 0m0.008s The difference on some real applications is much more modest and is just something like ~0.5%, but every little bit helps. /**** start of bench_ASA.c ****/ void __attribute__((naked)) f(int count, void *rand) { asm volatile ( " push {r4, r5, r6, lr}\n" " mov r4, r0\n" " mov r5, r1\n" "0:\n" ".rept 4096\n" " blx r5\n" " tst r0, #1\n" " bne 1f\n" " b 2f\n" ".balign 64\n" "1:\n" ".rept 15\n" " add r0, r0, #0\n" ".endr\n" " b 3f\n" ".balign 64\n" "2:\n" ".rept 16\n" " add r0, r0, #0\n" ".endr\n" "3:\n" ".endr\n" " subs r4, r4, #1\n" " bgt 0b\n" " pop {r4, r5, r6, pc}\n" ); } int main() { f(1000, rand); return 0; } /**** end of bench_ASA.c ****/ Signed-off-by: Siarhei Siamashka --- cpu/arm_cortexa8/omap3/board.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c index 7b78fa4..b9b71dc 100644 --- a/cpu/arm_cortexa8/omap3/board.c +++ b/cpu/arm_cortexa8/omap3/board.c @@ -140,8 +140,6 @@ void setup_auxcr() */ __asm__ __volatile__("mov r12, #0x3"); __asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1"); - /* Enabling ASA */ - __asm__ __volatile__("orr r0, r0, #0x10"); /* Enable L1NEON */ __asm__ __volatile__("orr r0, r0, #1 << 5"); /* SMI instruction to call ROM Code API */