@@ -260,4 +260,14 @@ void mx25_fec_init_pins (void)
writel (outpadctl, &padctl->pad_fec_tdata1);
}
+
+void imx_get_mac_from_fuse(unsigned char *mac)
+{
+ int i;
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ struct fuse_bank0 *fuse = (struct fuse_bank0 *)&iim->bank[0];
+
+ for (i = 0; i < 6; i++)
+ mac[i] = readl(&fuse->mac_addr[i]);
+}
#endif /* CONFIG_FEC_MXC */
@@ -313,6 +313,16 @@ void mx27_fec_init_pins(void)
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
}
+
+void imx_get_mac_from_fuse(unsigned char *mac)
+{
+ int i;
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ struct fuse_bank0 *fuse = (struct fuse_bank0 *)&iim->bank[0];
+
+ for (i = 0; i < 6; i++)
+ mac[6-1-i] = readl(&fuse->mac_addr[i]);
+}
#endif /* CONFIG_FEC_MXC */
#ifdef CONFIG_MXC_MMC
@@ -100,6 +100,18 @@ int cpu_eth_init(bd_t *bis)
return rc;
}
+#if defined(CONFIG_FEC_MXC)
+void imx_get_mac_from_fuse(unsigned char *mac)
+{
+ int i;
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ struct fuse_bank1 *fuse = (struct fuse_bank1 *)&iim->bank[1];
+
+ for (i = 0; i < 6; i++)
+ mac[i] = readl(&fuse->mac_addr[i]);
+}
+#endif
+
/*
* Initializes on-chip MMC controllers.
* to override, implement board_mmc_init()
@@ -36,6 +36,7 @@
#ifndef __ASSEMBLY__
#ifdef CONFIG_FEC_MXC
extern void mx25_fec_init_pins(void);
+extern void imx_get_mac_from_fuse(unsigned char *mac);
#endif
/* Clock Control Module (CCM) registers */
@@ -129,12 +130,17 @@ struct iim_regs {
u32 iim_srev;
u32 iim_prog_p;
u32 res1[0x1f5];
- u32 iim_bank_area0[0x20];
- u32 res2[0xe0];
- u32 iim_bank_area1[0x20];
- u32 res3[0xe0];
- u32 iim_bank_area2[0x20];
+ struct {
+ u32 fuse_regs[0x20];
+ u32 fuse_rsvd[0xe0];
+ } bank[3];
};
+
+struct fuse_bank0 {
+ u32 fuse1_26[0x1a];
+ u32 mac_addr[6];
+};
+
#endif
/* AIPS 1 */
@@ -312,7 +318,4 @@ struct iim_regs {
#define WSR_UNLOCK1 0x5555
#define WSR_UNLOCK2 0xAAAA
-/* FUSE bank offsets */
-#define IIM0_MAC 0x1a
-
#endif /* _IMX_REGS_H */
@@ -34,6 +34,7 @@ extern void mx27_uart_init_pins(void);
#ifdef CONFIG_FEC_MXC
extern void mx27_fec_init_pins(void);
+extern void imx_get_mac_from_fuse(unsigned char *mac);
#endif /* CONFIG_FEC_MXC */
#ifdef CONFIG_MXC_MMC
@@ -203,8 +204,18 @@ struct iim_regs {
u32 iim_scs2;
u32 iim_scs3;
u32 res[0x1F0];
- u32 iim_bank_area0[0x100];
+ struct {
+ u32 fuse_regs[0x20];
+ u32 fuse_rsvd[0xe0];
+ } bank[1];
+};
+
+struct fuse_bank0 {
+ u32 fuse1_4[4];
+ u32 mac_addr[6];
+ u32 word11_32[0x16];
};
+
#endif
#define IMX_IO_BASE 0x10000000
@@ -512,9 +523,4 @@ struct iim_regs {
#define IIM_ERR_SNSE (1 << 2)
#define IIM_ERR_PARITYE (1 << 1)
-/* Definitions for i.MX27 TO2 */
-#define IIM0_MAC 5
-#define IIM0_SCC_KEY 11
-#define IIM1_SUID 1
-
#endif /* _IMX_REGS_H */
@@ -205,9 +205,13 @@
#define BOARD_REV_1_0 0x0
#define BOARD_REV_2_0 0x1
+#define IMX_IIM_BASE (IIM_BASE_ADDR)
+
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/types.h>
+extern void imx_get_mac_from_fuse(unsigned char *mac);
+
#define __REG(x) (*((volatile u32 *)(x)))
#define __REG16(x) (*((volatile u16 *)(x)))
#define __REG8(x) (*((volatile u8 *)(x)))
@@ -275,6 +279,36 @@ struct src {
u32 sisr;
u32 simr;
};
+
+struct iim_regs {
+ u32 stat;
+ u32 statm;
+ u32 err;
+ u32 emask;
+ u32 fctl;
+ u32 ua;
+ u32 la;
+ u32 sdat;
+ u32 prev;
+ u32 srev;
+ u32 preg_p;
+ u32 scs0;
+ u32 scs1;
+ u32 scs2;
+ u32 scs3;
+ u32 res0[0x1f1];
+ struct {
+ u32 used[0x20];
+ u32 resv[0xe0];
+ } bank[4];
+};
+
+struct fuse_bank1 {
+ u32 fuse1_9[9];
+ u32 mac_addr[6];
+ u32 fuse6_32[0x11];
+};
+
#endif /* __ASSEMBLER__*/
#endif /* __ASM_ARCH_MXC_MX51_H__ */
@@ -312,21 +312,8 @@ static void fec_rbd_clean(int last, struct fec_bd *pRbd)
static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac)
{
-/*
- * The MX27 can store the mac address in internal eeprom
- * This mechanism is not supported now by MX51 or MX25
- */
-#if defined(CONFIG_MX51) || defined(CONFIG_MX25)
- return -1;
-#else
- struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
- int i;
-
- for (i = 0; i < 6; i++)
- mac[6-1-i] = readl(&iim->iim_bank_area0[IIM0_MAC + i]);
-
+ imx_get_mac_from_fuse(mac);
return !is_valid_ether_addr(mac);
-#endif
}
static int fec_set_hwaddr(struct eth_device *dev)
The patch is to support getting FEC MAC address from fuse bank. Signed-off-by: Jason Liu <r64343@freescale.com> --- Changes for v2: - correct the mac address byte order according to review comments - add memset(edev, 0. sizeof(*edev)) when do fec_probe, - fix some code comments Changes for v3: - rebase - address the comments of Stefano, make the imx_get_mac_from_fuse(), declared independently inside each imx-regs.h to make it specific for each processor, because it accesses to different structures. - address the comments of Wolfgang and Stefano, use struct to access mac_addr fuse. --- arch/arm/cpu/arm926ejs/mx25/generic.c | 10 ++++++++ arch/arm/cpu/arm926ejs/mx27/generic.c | 10 ++++++++ arch/arm/cpu/armv7/mx5/soc.c | 12 ++++++++++ arch/arm/include/asm/arch-mx25/imx-regs.h | 19 +++++++++------ arch/arm/include/asm/arch-mx27/imx-regs.h | 18 ++++++++++----- arch/arm/include/asm/arch-mx5/imx-regs.h | 34 +++++++++++++++++++++++++++++ drivers/net/fec_mxc.c | 15 +------------ 7 files changed, 90 insertions(+), 28 deletions(-)