From patchwork Tue Nov 16 08:26:06 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 71369 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D78FFB7125 for ; Tue, 16 Nov 2010 19:40:25 +1100 (EST) Received: from localhost ([127.0.0.1]:59334 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PIH4A-00070h-87 for incoming@patchwork.ozlabs.org; Tue, 16 Nov 2010 03:39:02 -0500 Received: from [140.186.70.92] (port=36503 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PIGsQ-000121-8u for qemu-devel@nongnu.org; Tue, 16 Nov 2010 03:27:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PIGrp-000701-Nr for qemu-devel@nongnu.org; Tue, 16 Nov 2010 03:26:42 -0500 Received: from mail.valinux.co.jp ([210.128.90.3]:34151) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PIGrp-0006zD-6g for qemu-devel@nongnu.org; Tue, 16 Nov 2010 03:26:17 -0500 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id CCDBF27E35; Tue, 16 Nov 2010 17:26:13 +0900 (JST) Received: (nullmailer pid 29399 invoked by uid 1000); Tue, 16 Nov 2010 08:26:12 -0000 From: Isaku Yamahata To: qemu-devel@nongnu.org Date: Tue, 16 Nov 2010 17:26:06 +0900 Message-Id: X-Mailer: git-send-email 1.7.1.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: skandasa@cisco.com, adnan@khaleel.us, wexu2@cisco.com, mst@redhat.com, yamahata@valinux.co.jp, etmartin@cisco.com Subject: [Qemu-devel] [PATCH v9 2/8] pci: fix accesses to pci status register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org pci status register is 16 bit, not 8 bit. So use helper function to manipulate status register. Signed-off-by: Isaku Yamahata --- hw/pci.c | 21 +++++++++++++-------- 1 files changed, 13 insertions(+), 8 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 2fc8ab1..52fe655 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -127,9 +127,11 @@ static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change) static void pci_update_irq_status(PCIDevice *dev) { if (dev->irq_state) { - dev->config[PCI_STATUS] |= PCI_STATUS_INTERRUPT; + pci_word_test_and_set_mask(dev->config + PCI_STATUS, + PCI_STATUS_INTERRUPT); } else { - dev->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT; + pci_word_test_and_clear_mask(dev->config + PCI_STATUS, + PCI_STATUS_INTERRUPT); } } @@ -404,7 +406,7 @@ void pci_device_save(PCIDevice *s, QEMUFile *f) * in irq_state which we are saving. * This makes us compatible with old devices * which never set or clear this bit. */ - s->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT; + pci_word_test_and_clear_mask(s->config + PCI_STATUS, PCI_STATUS_INTERRUPT); vmstate_save_state(f, pci_get_vmstate(s), s); /* Restore the interrupt status bit. */ pci_update_irq_status(s); @@ -530,7 +532,7 @@ static void pci_init_cmask(PCIDevice *dev) { pci_set_word(dev->cmask + PCI_VENDOR_ID, 0xffff); pci_set_word(dev->cmask + PCI_DEVICE_ID, 0xffff); - dev->cmask[PCI_STATUS] = PCI_STATUS_CAP_LIST; + pci_set_word(dev->cmask + PCI_STATUS, PCI_STATUS_CAP_LIST); dev->cmask[PCI_REVISION_ID] = 0xff; dev->cmask[PCI_CLASS_PROG] = 0xff; pci_set_word(dev->cmask + PCI_CLASS_DEVICE, 0xffff); @@ -1697,8 +1699,9 @@ static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id, { uint8_t next, prev; - if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST)) + if (!(pci_get_word(pdev->config + PCI_STATUS) & PCI_STATUS_CAP_LIST)) { return 0; + } for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]); prev = next + PCI_CAP_LIST_NEXT) @@ -1804,7 +1807,7 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, config[PCI_CAP_LIST_ID] = cap_id; config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST]; pdev->config[PCI_CAPABILITY_LIST] = offset; - pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST; + pci_word_test_and_set_mask(pdev->config + PCI_STATUS, PCI_STATUS_CAP_LIST); memset(pdev->used + offset, 0xFF, size); /* Make capability read-only by default */ memset(pdev->wmask + offset, 0, size); @@ -1827,8 +1830,10 @@ void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size) memset(pdev->cmask + offset, 0, size); memset(pdev->used + offset, 0, size); - if (!pdev->config[PCI_CAPABILITY_LIST]) - pdev->config[PCI_STATUS] &= ~PCI_STATUS_CAP_LIST; + if (!pdev->config[PCI_CAPABILITY_LIST]) { + pci_word_test_and_clear_mask(pdev->config + PCI_STATUS, + PCI_STATUS_CAP_LIST); + } } /* Reserve space for capability at a known offset (to call after load). */