| Message ID | 1484025641-5412-13-git-send-email-tien.fong.chee@intel.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Marek Vasut |
| Headers | show |
On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee <tien.fong.chee@intel.com> > > The Arria10 device will not be able to re-use the GEN5 SDRAM controller, > so we shouldn't build the driver. Move CONFIG_ALTERA_SDRAM to Kconfig > option in drivers/ddr/altera/Kconfig. > > Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Acked-by: Marek Vasut <marex@denx.de> > Cc: Marek Vasut <marex@denx.de> > Cc: Dinh Nguyen <dinguyen@kernel.org> > Cc: Chin Liang See <chin.liang.see@intel.com> > Cc: Tien Fong <skywindctf@gmail.com> > --- > drivers/Kconfig | 2 ++ > drivers/ddr/Kconfig | 1 + > drivers/ddr/altera/Kconfig | 6 ++++++ > include/configs/socfpga_common.h | 5 ----- > 4 files changed, 9 insertions(+), 5 deletions(-) > create mode 100644 drivers/ddr/Kconfig > create mode 100644 drivers/ddr/altera/Kconfig > > diff --git a/drivers/Kconfig b/drivers/Kconfig > index 0e5d97d..3e6bbac 100644 > --- a/drivers/Kconfig > +++ b/drivers/Kconfig > @@ -14,6 +14,8 @@ source "drivers/cpu/Kconfig" > > source "drivers/crypto/Kconfig" > > +source "drivers/ddr/Kconfig" > + > source "drivers/demo/Kconfig" > > source "drivers/ddr/fsl/Kconfig" > diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig > new file mode 100644 > index 0000000..b764add > --- /dev/null > +++ b/drivers/ddr/Kconfig > @@ -0,0 +1 @@ > +source "drivers/ddr/altera/Kconfig" > diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig > new file mode 100644 > index 0000000..9554da7 > --- /dev/null > +++ b/drivers/ddr/altera/Kconfig > @@ -0,0 +1,6 @@ > +config ALTERA_SDRAM > + bool "SoCFPGA SDRAM for Arria5/Cyclone5 devices" > + default y if TARGET_SOCFPGA_GEN5 > + help > + This is for building the SDRAM controller for the Arria5/Cyclone5 > + devices. > diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h > index 31f1338..bbbde1e 100644 > --- a/include/configs/socfpga_common.h > +++ b/include/configs/socfpga_common.h > @@ -77,11 +77,6 @@ > #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS > > /* > - * SDRAM controller > - */ > -#define CONFIG_ALTERA_SDRAM > - > -/* > * EPCS/EPCQx1 Serial Flash Controller > */ > #ifdef CONFIG_ALTERA_SPI >
diff --git a/drivers/Kconfig b/drivers/Kconfig index 0e5d97d..3e6bbac 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -14,6 +14,8 @@ source "drivers/cpu/Kconfig" source "drivers/crypto/Kconfig" +source "drivers/ddr/Kconfig" + source "drivers/demo/Kconfig" source "drivers/ddr/fsl/Kconfig" diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig new file mode 100644 index 0000000..b764add --- /dev/null +++ b/drivers/ddr/Kconfig @@ -0,0 +1 @@ +source "drivers/ddr/altera/Kconfig" diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig new file mode 100644 index 0000000..9554da7 --- /dev/null +++ b/drivers/ddr/altera/Kconfig @@ -0,0 +1,6 @@ +config ALTERA_SDRAM + bool "SoCFPGA SDRAM for Arria5/Cyclone5 devices" + default y if TARGET_SOCFPGA_GEN5 + help + This is for building the SDRAM controller for the Arria5/Cyclone5 + devices. diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 31f1338..bbbde1e 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -77,11 +77,6 @@ #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS /* - * SDRAM controller - */ -#define CONFIG_ALTERA_SDRAM - -/* * EPCS/EPCQx1 Serial Flash Controller */ #ifdef CONFIG_ALTERA_SPI