| Message ID | 1484025641-5412-10-git-send-email-tien.fong.chee@intel.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Marek Vasut |
| Headers | show |
On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee <tien.fong.chee@intel.com> > > On arria5/cyclone5 parts, the bsel bits are at shift 0, while for arria10, > the bsel bits are at shift 12. Add SYSMGR_BOOTINFO_BSEL_SHIFT define so that > the reading the bsel can generic. > > Suggested-by: Marek Vasut <marex@denx.de> > Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> > Cc: Marek Vasut <marex@denx.de> > Cc: Dinh Nguyen <dinguyen@kernel.org> > Cc: Chin Liang See <chin.liang.see@intel.com> > Cc: Tien Fong <skywindctf@gmail.com> This should be somehow merged into 5/28 > --- > arch/arm/mach-socfpga/include/mach/system_manager.h | 2 ++ > arch/arm/mach-socfpga/misc.c | 4 ++-- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h > index e688c50..9ca889a 100644 > --- a/arch/arm/mach-socfpga/include/mach/system_manager.h > +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h > @@ -203,8 +203,10 @@ struct socfpga_system_manager { > > #if defined(CONFIG_TARGET_SOCFPGA_GEN5) > #define SYSMGR_SDMMC_SMPLSEL_SHIFT 3 > +#define SYSMGR_BOOTINFO_BSEL_SHIFT 0 > #else > #define SYSMGR_SDMMC_SMPLSEL_SHIFT 4 > +#define SYSMGR_BOOTINFO_BSEL_SHIFT 12 > #endif > > #define SYSMGR_SDMMC_DRVSEL_SHIFT 0 > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c > index c1e5969..2645129 100644 > --- a/arch/arm/mach-socfpga/misc.c > +++ b/arch/arm/mach-socfpga/misc.c > @@ -261,12 +261,12 @@ static int socfpga_fpga_id(const bool print_id) > #if defined(CONFIG_DISPLAY_CPUINFO) > int print_cpuinfo(void) > { > + const u32 bsel = (readl(&sysmgr_regs->bootinfo) >> > + SYSMGR_BOOTINFO_BSEL_SHIFT) & 0x7; > #if defined(CONFIG_TARGET_SOCFPGA_GEN5) > - const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7; > puts("CPU: Altera SoCFPGA Platform\n"); > socfpga_fpga_id(1); > #else > - const u32 bsel = (readl(&sysmgr_regs->bootinfo) >> 12) & 0x7; > puts("CPU: Altera SoCFPGA Arria 10\n"); > #endif > printf("BOOT: %s\n", bsel_str[bsel].name); >
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h index e688c50..9ca889a 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h @@ -203,8 +203,10 @@ struct socfpga_system_manager { #if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define SYSMGR_SDMMC_SMPLSEL_SHIFT 3 +#define SYSMGR_BOOTINFO_BSEL_SHIFT 0 #else #define SYSMGR_SDMMC_SMPLSEL_SHIFT 4 +#define SYSMGR_BOOTINFO_BSEL_SHIFT 12 #endif #define SYSMGR_SDMMC_DRVSEL_SHIFT 0 diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index c1e5969..2645129 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -261,12 +261,12 @@ static int socfpga_fpga_id(const bool print_id) #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void) { + const u32 bsel = (readl(&sysmgr_regs->bootinfo) >> + SYSMGR_BOOTINFO_BSEL_SHIFT) & 0x7; #if defined(CONFIG_TARGET_SOCFPGA_GEN5) - const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7; puts("CPU: Altera SoCFPGA Platform\n"); socfpga_fpga_id(1); #else - const u32 bsel = (readl(&sysmgr_regs->bootinfo) >> 12) & 0x7; puts("CPU: Altera SoCFPGA Arria 10\n"); #endif printf("BOOT: %s\n", bsel_str[bsel].name);