From patchwork Mon Nov 15 07:30:44 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 71199 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 22F82B7107 for ; Mon, 15 Nov 2010 19:08:23 +1100 (EST) Received: from localhost ([127.0.0.1]:33333 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PHtkx-0003Kg-E3 for incoming@patchwork.ozlabs.org; Mon, 15 Nov 2010 02:45:39 -0500 Received: from [140.186.70.92] (port=51295 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PHtWm-0003g7-Ln for qemu-devel@nongnu.org; Mon, 15 Nov 2010 02:31:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PHtWg-000284-8G for qemu-devel@nongnu.org; Mon, 15 Nov 2010 02:31:00 -0500 Received: from mail.valinux.co.jp ([210.128.90.3]:48038) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PHtWf-000277-Gw for qemu-devel@nongnu.org; Mon, 15 Nov 2010 02:30:54 -0500 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id 5E4CC87499; Mon, 15 Nov 2010 16:30:48 +0900 (JST) Received: (nullmailer pid 10375 invoked by uid 1000); Mon, 15 Nov 2010 07:30:47 -0000 From: Isaku Yamahata To: qemu-devel@nongnu.org Date: Mon, 15 Nov 2010 16:30:44 +0900 Message-Id: <42f9ff34548538a1ccbb2872e1448b3a98b9714f.1289805831.git.yamahata@valinux.co.jp> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: skandasa@cisco.com, adnan@khaleel.us, wexu2@cisco.com, mst@redhat.com, yamahata@valinux.co.jp, etmartin@cisco.com Subject: [Qemu-devel] [PATCH v8 08/11] pcie/aer: glue aer error injection into qemu monitor X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org introduce pcie_aer_inject_error command. Signed-off-by: Isaku Yamahata --- Changes v7 -> v8: - use domain:slot.func:slot.func...:slot.func instead of domain:bus:slot.func - allow symbolic aer error name in addition to 32bit value Changes v6 -> v7: - check return value. Changes v3 -> v4: - s/PCIE_AER/PCIEAER/g for structure names. - compilation adjustment. Changes v2 -> v3: - compilation adjustment. pcie/aer/qmp: glue update glue update. Signed-off-by: Isaku Yamahata pcie/aer: update glue function update glue function. Signed-off-by: Isaku Yamahata --- hmp-commands.hx | 23 ++++++ hw/pcie_aer.c | 219 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ sysemu.h | 5 + 3 files changed, 247 insertions(+), 0 deletions(-) diff --git a/hmp-commands.hx b/hmp-commands.hx index e5585ba..32b8d8d 100644 --- a/hmp-commands.hx +++ b/hmp-commands.hx @@ -836,6 +836,29 @@ Hot remove PCI device. ETEXI { + .name = "pcie_aer_inject_error", + .args_type = "advisory_non_fatal:-a,correctable:-c," + "pci_dev_path:s,error_status:s," + "header0:i?,header1:i?,header2:i?,header3:i?," + "prefix0:i?,prefix1:i?,prefix2:i?,prefix3:i?", + .params = "[-a] [-c] [[:].:...:. " + " " + "[] " + "[]", + .help = "inject pcie aer error " + "(use -a for advisory non fatal error) " + "(use -c for correctable error)", + .user_print = pcie_aer_inject_error_print, + .mhandler.cmd_new = do_pcie_aer_inejct_error, + }, + +STEXI +@item pcie_aer_inject_error +@findex pcie_aer_inject_error +Inject PCIe AER error +ETEXI + + { .name = "host_net_add", .args_type = "device:s,opts:s?", .params = "tap|user|socket|vde|dump [options]", diff --git a/hw/pcie_aer.c b/hw/pcie_aer.c index 0aabdb3..2d3991c 100644 --- a/hw/pcie_aer.c +++ b/hw/pcie_aer.c @@ -19,6 +19,8 @@ */ #include "sysemu.h" +#include "qemu-objects.h" +#include "monitor.h" #include "pci_bridge.h" #include "pcie.h" #include "msix.h" @@ -824,3 +826,220 @@ const VMStateDescription vmstate_pcie_aer_log = { } }; +void pcie_aer_inject_error_print(Monitor *mon, const QObject *data) +{ + QDict *qdict; + int devfn; + assert(qobject_type(data) == QTYPE_QDICT); + qdict = qobject_to_qdict(data); + + devfn = (int)qdict_get_int(qdict, "devfn"); + monitor_printf(mon, "OK domain: %x, bus: %x devfn: %x.%x\n", + (int) qdict_get_int(qdict, "domain"), + (int) qdict_get_int(qdict, "bus"), + PCI_SLOT(devfn), PCI_FUNC(devfn)); +} + +typedef struct PCIEAERErrorName { + const char *name; + uint32_t val; + bool correctable; +} PCIEAERErrorName; + +/* + * AER error name -> value convertion table + * This naming scheme is same to linux aer-injection tool. + */ +static const struct PCIEAERErrorName pcie_aer_error_list[] = { + { + .name = "TRAIN", + .val = PCI_ERR_UNC_TRAIN, + .correctable = false, + }, { + .name = "DLP", + .val = PCI_ERR_UNC_DLP, + .correctable = false, + }, { + .name = "SDN", + .val = PCI_ERR_UNC_SDN, + .correctable = false, + }, { + .name = "POISON_TLP", + .val = PCI_ERR_UNC_POISON_TLP, + .correctable = false, + }, { + .name = "FCP", + .val = PCI_ERR_UNC_FCP, + .correctable = false, + }, { + .name = "COMP_TIME", + .val = PCI_ERR_UNC_COMP_TIME, + .correctable = false, + }, { + .name = "COMP_ABORT", + .val = PCI_ERR_UNC_COMP_ABORT, + .correctable = false, + }, { + .name = "UNX_COMP", + .val = PCI_ERR_UNC_UNX_COMP, + .correctable = false, + }, { + .name = "RX_OVER", + .val = PCI_ERR_UNC_RX_OVER, + .correctable = false, + }, { + .name = "MALF_TLP", + .val = PCI_ERR_UNC_MALF_TLP, + .correctable = false, + }, { + .name = "ECRC", + .val = PCI_ERR_UNC_ECRC, + .correctable = false, + }, { + .name = "UNSUP", + .val = PCI_ERR_UNC_UNSUP, + .correctable = false, + }, { + .name = "ACSV", + .val = PCI_ERR_UNC_ACSV, + .correctable = false, + }, { + .name = "INTN", + .val = PCI_ERR_UNC_INTN, + .correctable = false, + }, { + .name = "MCBTLP", + .val = PCI_ERR_UNC_MCBTLP, + .correctable = false, + }, { + .name = "ATOP_EBLOCKED", + .val = PCI_ERR_UNC_ATOP_EBLOCKED, + .correctable = false, + }, { + .name = "TLP_PRF_BLOCKED", + .val = PCI_ERR_UNC_TLP_PRF_BLOCKED, + .correctable = false, + }, { + .name = "RCVR", + .val = PCI_ERR_COR_RCVR, + .correctable = true, + }, { + .name = "BAD_TLP", + .val = PCI_ERR_COR_BAD_TLP, + .correctable = true, + }, { + .name = "BAD_DLLP", + .val = PCI_ERR_COR_BAD_DLLP, + .correctable = true, + }, { + .name = "REP_ROLL", + .val = PCI_ERR_COR_REP_ROLL, + .correctable = true, + }, { + .name = "REP_TIMER", + .val = PCI_ERR_COR_REP_TIMER, + .correctable = true, + }, { + .name = "ADV_NONFATAL", + .val = PCI_ERR_COR_ADV_NONFATAL, + .correctable = true, + }, { + .name = "INTERNAL", + .val = PCI_ERR_COR_INTERNAL, + .correctable = true, + }, { + .name = "HL_OVERFLOW", + .val = PCI_ERR_COR_HL_OVERFLOW, + .correctable = true, + }, +}; + +static int pcie_aer_parse_error_string(const char *error_name, + uint32_t *status, bool *correctable) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(pcie_aer_error_list); i++) { + const PCIEAERErrorName *e = &pcie_aer_error_list[i]; + if (strcmp(error_name, e->name)) { + continue; + } + + *status = e->val; + *correctable = e->correctable; + return 0; + } + return -1; +} + +int do_pcie_aer_inejct_error(Monitor *mon, + const QDict *qdict, QObject **ret_data) +{ + const char *pci_dev_path = qdict_get_str(qdict, "pci_dev_path"); + const char *error_name; + uint32_t error_status; + bool correctable; + PCIDevice *dev; + PCIEAERErr err; + int ret; + + if (pci_parse_dev_path(pci_dev_path, &dev)) { + monitor_printf(mon, + "pci device path is invalid or device not found. %s\n", + pci_dev_path); + } + if (!pci_is_express(dev)) { + monitor_printf(mon, "the device doesn't support pci express. %s\n", + pci_dev_path); + return -1; + } + + error_name = qdict_get_str(qdict, "error_status"); + if (pcie_aer_parse_error_string(error_name, &error_status, &correctable)) { + char *e = NULL; + error_status = strtoul(error_name, &e, 0); + correctable = !!qdict_get_int(qdict, "correctable"); + if (!e || *e != '\0') { + monitor_printf(mon, "invalid error status value. \"%s\"", + error_name); + return -1; + } + } + err.source_id = (pci_bus_num(dev->bus) << 8) | dev->devfn; + + err.flags = 0; + if (correctable) { + err.flags |= PCIE_AER_ERR_IS_CORRECTABLE; + } + if (qdict_get_int(qdict, "advisory_non_fatal")) { + err.flags |= PCIE_AER_ERR_MAYBE_ADVISORY; + } + if (qdict_haskey(qdict, "header0")) { + err.flags |= PCIE_AER_ERR_HEADER_VALID; + } + if (qdict_haskey(qdict, "prefix0")) { + err.flags |= PCIE_AER_ERR_TLP_PREFIX_PRESENT; + } + + err.header[0] = qdict_get_try_int(qdict, "header0", 0); + err.header[1] = qdict_get_try_int(qdict, "header1", 0); + err.header[2] = qdict_get_try_int(qdict, "header2", 0); + err.header[3] = qdict_get_try_int(qdict, "header3", 0); + + err.prefix[0] = qdict_get_try_int(qdict, "prefix0", 0); + err.prefix[1] = qdict_get_try_int(qdict, "prefix1", 0); + err.prefix[2] = qdict_get_try_int(qdict, "prefix2", 0); + err.prefix[3] = qdict_get_try_int(qdict, "prefix3", 0); + + ret = pcie_aer_inject_error(dev, &err); + *ret_data = qobject_from_jsonf("{'dev_path': %s, " + "'domain': %d, 'bus': %d, 'devfn': %d, " + "'ret': %d}", + pci_dev_path, + pci_find_domain(dev->bus), + pci_bus_num(dev->bus), dev->devfn, + ret); + assert(*ret_data); + + return 0; +} diff --git a/sysemu.h b/sysemu.h index b81a70e..99c7909 100644 --- a/sysemu.h +++ b/sysemu.h @@ -151,6 +151,11 @@ void pci_device_hot_add(Monitor *mon, const QDict *qdict); void drive_hot_add(Monitor *mon, const QDict *qdict); void do_pci_device_hot_remove(Monitor *mon, const QDict *qdict); +/* pcie aer error injection */ +void pcie_aer_inject_error_print(Monitor *mon, const QObject *data); +int do_pcie_aer_inejct_error(Monitor *mon, + const QDict *qdict, QObject **ret_data); + /* serial ports */ #define MAX_SERIAL_PORTS 4