@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/arch/sama5_sfr.h>
@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/arch/sama5_matrix.h>
@@ -8,6 +8,7 @@
*/
#include <common.h>
+#include <asm/hardware.h>
#include <dm/device.h>
#include <dm/pinctrl.h>
#include <linux/io.h>
@@ -10,8 +10,6 @@
#ifndef __AT91_SAMA5_COMMON_H
#define __AT91_SAMA5_COMMON_H
-#include <asm/hardware.h>
-
#define CONFIG_SYS_TEXT_BASE 0x26f00000
/* ARM asynchronous clock */
@@ -22,11 +22,14 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_FAT_WRITE
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
+
/*
* Memory configurations
*/
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#ifdef CONFIG_SPL_BUILD
@@ -55,8 +58,8 @@
* Serial Driver
*/
#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_USART0
-#define CONFIG_USART_ID ATMEL_ID_USART0
+#define CONFIG_USART_BASE 0xf802c000
+#define CONFIG_USART_ID 6
/*
* Ethernet
@@ -17,10 +17,13 @@
/* serial console */
#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_UART0
-#define CONFIG_USART_ID ATMEL_ID_UART0
+#define CONFIG_USART_BASE 0xf801c000
+#define CONFIG_USART_ID 24
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xf804803c
+
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
@@ -53,7 +56,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x80000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
@@ -19,9 +19,12 @@
#define CONFIG_MISC_INIT_R
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xf804803c
+
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
@@ -18,16 +18,19 @@
* This needs to be defined for the OHCI code to work but it is defined as
* ATMEL_ID_UHPHS in the CPU specific header files.
*/
-#define ATMEL_ID_UHP ATMEL_ID_UHPHS
+#define ATMEL_ID_UHP 32
/*
* Specify the clock enable bit in the PMC_SCER register.
*/
-#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
+#define ATMEL_PMC_UHP (1 << 6)
+
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#ifdef CONFIG_SPL_BUILD
@@ -43,7 +46,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x60000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
@@ -86,7 +89,7 @@
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_DOS_PARTITION
@@ -27,12 +27,12 @@
* This needs to be defined for the OHCI code to work but it is defined as
* ATMEL_ID_UHPHS in the CPU specific header files.
*/
-#define ATMEL_ID_UHP ATMEL_ID_UHPHS
+#define ATMEL_ID_UHP 32
/*
* Specify the clock enable bit in the PMC_SCER register.
*/
-#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
+#define ATMEL_PMC_UHP (1 << 6)
/* LCD */
#define LCD_BPP LCD_COLOR16
@@ -57,9 +57,12 @@
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#endif
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
+
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
@@ -75,7 +78,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x60000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
@@ -14,9 +14,12 @@
#define CONFIG_BOARD_EARLY_INIT_F
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
+
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
@@ -34,7 +37,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x80000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
@@ -14,9 +14,12 @@
#define CONFIG_BOARD_EARLY_INIT_F
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
+
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
#ifdef CONFIG_SPL_BUILD
@@ -34,7 +37,7 @@
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE 0x80000000
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
@@ -26,12 +26,15 @@
/* serial console */
#define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE ATMEL_BASE_USART3
-#define CONFIG_USART_ID ATMEL_ID_USART3
+#define CONFIG_USART_BASE 0xfc00c000
+#define CONFIG_USART_ID 30
+
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x4000000
#define CONFIG_SYS_INIT_SP_ADDR \
@@ -60,7 +63,7 @@
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
-#define ATMEL_BASE_MMCI ATMEL_BASE_MCI1
+#define ATMEL_BASE_MMCI 0xfc000000
#define CONFIG_SYS_MMC_CLK_OD 500000
/* For generating MMC partitions */
As said in READRE.kconfig, include/configs/*.h will be removed after all options are switched to Kconfig. As the first step, remove the follow line from include/configs/at91-sama5_common.h. #include <asm/hardware.h> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> --- arch/arm/mach-at91/atmel_sfr.c | 1 + arch/arm/mach-at91/matrix.c | 1 + drivers/pinctrl/pinctrl-at91.c | 1 + include/configs/at91-sama5_common.h | 2 -- include/configs/ma5d4evk.h | 9 ++++++--- include/configs/sama5d2_ptc.h | 11 +++++++---- include/configs/sama5d2_xplained.h | 5 ++++- include/configs/sama5d3_xplained.h | 13 ++++++++----- include/configs/sama5d3xek.h | 11 +++++++---- include/configs/sama5d4_xplained.h | 7 +++++-- include/configs/sama5d4ek.h | 7 +++++-- include/configs/vinco.h | 11 +++++++---- 12 files changed, 52 insertions(+), 27 deletions(-)