| Message ID | 1819012.0ROIJmx7mp@wasted.cogentembedded.com |
|---|---|
| State | Accepted, archived |
| Delegated to: | David Miller |
| Headers | show |
On 01/04/2017 10:18 PM, Sergei Shtylyov wrote: > As the SH77{34|63} manuals are freely available, I've checked the EESIPR > values written against the manuals, and they appeared to set the reserved > bits 11-15 (which should be 0 on write). Fix those EESIPR values. > > Fixes: 380af9e390ec ("net: sh_eth: CPU dependency code collect to "struct sh_eth_cpu_data"") For SH7763 the bug is older than this commit but the code was common for all SH SoCs supported back then and so couldn't be fixed w/o affecting other SoCs. However, I suspect that the mask was incorrect even for the other SoCs... > Fixes: f5d12767c8fd ("sh_eth: get SH77{34|63} support out of #ifdef") That's the point where SH7734/63 data were split... > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> [...] MBR, Sergei
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Date: Wed, 04 Jan 2017 22:18:24 +0300 > As the SH77{34|63} manuals are freely available, I've checked the EESIPR > values written against the manuals, and they appeared to set the reserved > bits 11-15 (which should be 0 on write). Fix those EESIPR values. > > Fixes: 380af9e390ec ("net: sh_eth: CPU dependency code collect to "struct sh_eth_cpu_data"") > Fixes: f5d12767c8fd ("sh_eth: get SH77{34|63} support out of #ifdef") > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Applied.
Index: net/drivers/net/ethernet/renesas/sh_eth.c =================================================================== --- net.orig/drivers/net/ethernet/renesas/sh_eth.c +++ net/drivers/net/ethernet/renesas/sh_eth.c @@ -802,7 +802,7 @@ static struct sh_eth_cpu_data sh7734_dat .ecsr_value = ECSR_ICD | ECSR_MPD, .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, - .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, + .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003f07ff, .tx_check = EESR_TC1 | EESR_FTC, .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | @@ -831,7 +831,7 @@ static struct sh_eth_cpu_data sh7763_dat .ecsr_value = ECSR_ICD | ECSR_MPD, .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, - .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff, + .eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003f07ff, .tx_check = EESR_TC1 | EESR_FTC, .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
As the SH77{34|63} manuals are freely available, I've checked the EESIPR values written against the manuals, and they appeared to set the reserved bits 11-15 (which should be 0 on write). Fix those EESIPR values. Fixes: 380af9e390ec ("net: sh_eth: CPU dependency code collect to "struct sh_eth_cpu_data"") Fixes: f5d12767c8fd ("sh_eth: get SH77{34|63} support out of #ifdef") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- This patch is against DaveM's 'net.git' repo. drivers/net/ethernet/renesas/sh_eth.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)