From patchwork Sun Nov 14 10:29:20 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 71095 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 669A4B711C for ; Sun, 14 Nov 2010 21:30:09 +1100 (EST) Received: (qmail 21191 invoked by alias); 14 Nov 2010 10:30:08 -0000 Received: (qmail 21181 invoked by uid 22791); 14 Nov 2010 10:30:06 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, TW_CP, T_TO_NO_BRKTS_FREEMAIL X-Spam-Check-By: sourceware.org Received: from mail-wy0-f175.google.com (HELO mail-wy0-f175.google.com) (74.125.82.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sun, 14 Nov 2010 10:29:30 +0000 Received: by wyi11 with SMTP id 11so4028791wyi.20 for ; Sun, 14 Nov 2010 02:29:28 -0800 (PST) Received: by 10.227.157.196 with SMTP id c4mr4766519wbx.174.1289730567891; Sun, 14 Nov 2010 02:29:27 -0800 (PST) Received: from localhost (rsandifo.gotadsl.co.uk [82.133.89.107]) by mx.google.com with ESMTPS id i19sm4217995wbe.17.2010.11.14.02.29.24 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 14 Nov 2010 02:29:25 -0800 (PST) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, rdsandiford@googlemail.com Subject: [committed] Restrict creation of MIPS16 gp pseudo reg Date: Sun, 14 Nov 2010 10:29:20 +0000 Message-ID: <8739r48agv.fsf@firetop.home> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (gnu/linux) MIME-Version: 1.0 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This patch fixes three gcc.c-torture/execute tests (931110-1.c, memcpy-bi.c and pr43220.c) that were failing with -mabi=32/-mips16 on mips64-linux-gnu. The problem was that rtl optimisation passes were calling the move expanders with expressions taken from REG_EQUAL notes, and on MIPS16, those expanders were introducing new uses of the GP pseudo register. The moves were then being inserted before the initialisation of that pseudo register. This GP pseudo has always been a bit of a hack. Perhaps we should have some generic code that targets like MIPS and ARM can call to handle this sort of thing. In the meantime though, MIPS really shouldn't be introducing new uses of the pseudo once it has lost control of the definition. The only "safe" time is during expand. At some point we should probably also switch MIPS over to using insert_insn_on_edge, like ARM. Tested on mips64-linux-gnu and applied. Richard gcc/ * config/mips/mips.c (machine_function): Remove initialized_mips16_gp_pseudo_p. (mips16_gp_pseudo_reg): Use cfun->machine->mips16_gp_pseudo_rtx to detect whether a pseudo has already been created. Unconditionally create a new one if not. (mips_pic_base_register): Only call mips16_gp_pseudo_reg when expanding to rtl. Create a new pseudo otherwise, if allowed. Index: gcc/config/mips/mips.c =================================================================== --- gcc/config/mips/mips.c 2010-11-13 17:22:18.000000000 +0000 +++ gcc/config/mips/mips.c 2010-11-13 17:24:03.000000000 +0000 @@ -374,10 +374,6 @@ struct GTY(()) machine_function { split_insns pass; see mips_must_initialize_gp_p () for details. */ bool must_restore_gp_when_clobbered_p; - /* True if we have emitted an instruction to initialize - mips16_gp_pseudo_rtx. */ - bool initialized_mips16_gp_pseudo_p; - /* True if this is an interrupt handler. */ bool interrupt_handler_p; @@ -2654,16 +2650,11 @@ gen_load_const_gp (rtx reg) mips16_gp_pseudo_reg (void) { if (cfun->machine->mips16_gp_pseudo_rtx == NULL_RTX) - cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode); - - /* Don't emit an instruction to initialize the pseudo register if - we are being called from the tree optimizers' cost-calculation - routines. */ - if (!cfun->machine->initialized_mips16_gp_pseudo_p - && (current_ir_type () != IR_GIMPLE || currently_expanding_to_rtl)) { rtx insn, scan; + cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode); + push_topmost_sequence (); scan = get_insns (); @@ -2674,8 +2665,6 @@ mips16_gp_pseudo_reg (void) emit_insn_after (insn, scan); pop_topmost_sequence (); - - cfun->machine->initialized_mips16_gp_pseudo_p = true; } return cfun->machine->mips16_gp_pseudo_rtx; @@ -2690,9 +2679,12 @@ mips_pic_base_register (rtx temp) if (!TARGET_MIPS16) return pic_offset_table_rtx; - if (can_create_pseudo_p ()) + if (currently_expanding_to_rtl) return mips16_gp_pseudo_reg (); + if (can_create_pseudo_p ()) + temp = gen_reg_rtx (Pmode); + if (TARGET_USE_GOT) /* The first post-reload split exposes all references to $gp (both uses and definitions). All references must remain