Message ID | 87eg0j7f7q.fsf@linux.vnet.ibm.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
On Wed, 04 Jan 2017 07:34:41 +0530 "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> wrote: > Nicholas Piggin <npiggin@gmail.com> writes: > > > Commit 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits") > > mixed up PMD_INDEX_SIZE and PMD_CACHE_INDEX a couple of times. This > > resulted in 64s/hash/4k configs to panic at boot with a false positive > > error check. > > > > Fix that and simplify error handling by moving the check to the caller. > > > > Fixes: 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits") > > Cc: Christophe Leroy <christophe.leroy@c-s.fr> > > Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > > Cc: Scott Wood <oss@buserror.net> > > Cc: linuxppc-dev@lists.ozlabs.org > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > > I did another fix here. > > https://lkml.kernel.org/r/20161214043349.23677-1-aneesh.kumar@linux.vnet.ibm.com > > But this patch makes it much simpler. Hence. > > Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > > There is this hunk in the patch I did. Ah, I missed that. My patch just fixes the 9b081e10805cd bug, but this hunk looks like it should still go in as another patch. Will you resend it? Thanks, Nick > > --- a/arch/powerpc/include/asm/book3s/64/hash.h > +++ b/arch/powerpc/include/asm/book3s/64/hash.h > @@ -33,9 +33,9 @@ > H_PUD_INDEX_SIZE + H_PGD_INDEX_SIZE + PAGE_SHIFT) > #define H_PGTABLE_RANGE (ASM_CONST(1) << H_PGTABLE_EADDR_SIZE) > > -#ifdef CONFIG_TRANSPARENT_HUGEPAGE > +#if defined(CONFIG_TRANSPARENT_HUGEPAGE) && defined(CONFIG_PPC_64K_PAGES) > /* > - * only with hash we need to use the second half of pmd page table > + * only with hash 64k we need to use the second half of pmd page table > * to store pointer to deposited pgtable_t > */ > #define H_PMD_CACHE_INDEX (H_PMD_INDEX_SIZE + 1) >
Nicholas Piggin <npiggin@gmail.com> writes: > On Wed, 04 Jan 2017 07:34:41 +0530 > "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> wrote: > >> Nicholas Piggin <npiggin@gmail.com> writes: >> >> > Commit 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits") >> > mixed up PMD_INDEX_SIZE and PMD_CACHE_INDEX a couple of times. This >> > resulted in 64s/hash/4k configs to panic at boot with a false positive >> > error check. >> > >> > Fix that and simplify error handling by moving the check to the caller. >> > >> > Fixes: 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits") >> > Cc: Christophe Leroy <christophe.leroy@c-s.fr> >> > Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> >> > Cc: Scott Wood <oss@buserror.net> >> > Cc: linuxppc-dev@lists.ozlabs.org >> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> >> >> I did another fix here. >> >> https://lkml.kernel.org/r/20161214043349.23677-1-aneesh.kumar@linux.vnet.ibm.com >> >> But this patch makes it much simpler. Hence. >> >> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> >> >> There is this hunk in the patch I did. > > Ah, I missed that. My patch just fixes the 9b081e10805cd bug, but this > hunk looks like it should still go in as another patch. Will you resend > it? > ok will do that. -aneesh
--- a/arch/powerpc/include/asm/book3s/64/hash.h +++ b/arch/powerpc/include/asm/book3s/64/hash.h @@ -33,9 +33,9 @@ H_PUD_INDEX_SIZE + H_PGD_INDEX_SIZE + PAGE_SHIFT) #define H_PGTABLE_RANGE (ASM_CONST(1) << H_PGTABLE_EADDR_SIZE) -#ifdef CONFIG_TRANSPARENT_HUGEPAGE +#if defined(CONFIG_TRANSPARENT_HUGEPAGE) && defined(CONFIG_PPC_64K_PAGES) /* - * only with hash we need to use the second half of pmd page table + * only with hash 64k we need to use the second half of pmd page table * to store pointer to deposited pgtable_t */ #define H_PMD_CACHE_INDEX (H_PMD_INDEX_SIZE + 1)