@@ -12,6 +12,7 @@
#include <libfdt.h>
#include <malloc.h>
#include <sdhci.h>
+#include <clk.h>
/* 400KHz is max freq for card ID etc. Use that as min */
#define EMMC_MIN_FREQ 400000
@@ -33,6 +34,16 @@ static int arasan_sdhci_probe(struct udevice *dev)
struct rockchip_sdhc *prv = dev_get_priv(dev);
struct sdhci_host *host = &prv->host;
int ret;
+ struct clk clk;
+
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (!ret) {
+ ret = clk_set_rate(&clk, CONFIG_ROCKCHIP_SDHCI_MAX_FREQ);
+ if (IS_ERR_VALUE(ret))
+ printf("%s clk set rate fail!\n", __func__);
+ } else {
+ printf("%s fail to get clk\n", __func__)
+ }
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
Init the clock rate to CONFIG_ROCKCHIP_SDHCI_MAX_FREQ with clock driver api. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> --- Changes in v2: - using the return value drivers/mmc/rockchip_sdhci.c | 11 +++++++++++ 1 file changed, 11 insertions(+)