Message ID | 1482833066-29291-10-git-send-email-peng.fan@nxp.com |
---|---|
State | Accepted |
Commit | 3ca0f0d2daabc763df0cedaf74b5049337aa4311 |
Delegated to: | Stefano Babic |
Headers | show |
On 27/12/2016 11:04, Peng Fan wrote: > Update the mxc_ocotp driver to support i.MX7ULP. > The read/write sequence has some changes due to > PDN and OUT_STATUS registers added and TIME register is > removed. Also update the bank size and number. > > Add is_mx7ulp macro in sys_proto.h > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > Signed-off-by: Ye Li <ye.li@nxp.com> > Cc: Stefano Babic <sbabic@denx.de> > --- > > V2: > Add imx_mx7ulp, and small update. > > arch/arm/include/asm/imx-common/sys_proto.h | 2 ++ > drivers/misc/mxc_ocotp.c | 52 ++++++++++++++++++++++++++++- > 2 files changed, 53 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h > index 539d34b..732b692 100644 > --- a/arch/arm/include/asm/imx-common/sys_proto.h > +++ b/arch/arm/include/asm/imx-common/sys_proto.h > @@ -38,6 +38,8 @@ > #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL)) > #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL)) > > +#define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP)) > + > u32 get_nr_cpus(void); > u32 get_cpu_rev(void); > u32 get_cpu_speed_grade_hz(void); > diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c > index 0b1c050..88610d6 100644 > --- a/drivers/misc/mxc_ocotp.c > +++ b/drivers/misc/mxc_ocotp.c > @@ -29,6 +29,12 @@ > #ifdef CONFIG_MX7 > #define BM_CTRL_ADDR 0x0000000f > #define BM_CTRL_RELOAD 0x00000400 > +#elif defined(CONFIG_MX7ULP) > +#define BM_CTRL_ADDR 0x000000FF > +#define BM_CTRL_RELOAD 0x00000400 > +#define BM_OUT_STATUS_DED 0x00000400 > +#define BM_OUT_STATUS_LOCKED 0x00000800 > +#define BM_OUT_STATUS_PROGFAIL 0x00001000 > #else > #define BM_CTRL_ADDR 0x0000007f > #endif > @@ -70,6 +76,9 @@ > #elif defined CONFIG_MX7 > #define FUSE_BANK_SIZE 0x40 > #define FUSE_BANKS 16 > +#elif defined(CONFIG_MX7ULP) > +#define FUSE_BANK_SIZE 0x80 > +#define FUSE_BANKS 31 > #else > #error "Unsupported architecture\n" > #endif > @@ -98,7 +107,7 @@ u32 fuse_bank_physical(int index) > { > u32 phy_index; > > - if (is_mx6sl()) { > + if (is_mx6sl() || is_mx7ulp()) { > phy_index = index; > } else if (is_mx6ul() || is_mx6ull() || is_mx6sll()) { > if ((is_mx6ull() || is_mx6sll()) && index == 8) > @@ -187,6 +196,10 @@ static int finish_access(struct ocotp_regs *regs, const char *caller) > err = !!(readl(®s->ctrl) & BM_CTRL_ERROR); > clear_error(regs); > > +#ifdef CONFIG_MX7ULP > + /* Need to power down the OTP memory */ > + writel(1, ®s->pdn); > +#endif > if (err) { > printf("mxc_ocotp %s(): Access protect error\n", caller); > return -EIO; > @@ -217,6 +230,13 @@ int fuse_read(u32 bank, u32 word, u32 *val) > > *val = readl(®s->bank[phy_bank].fuse_regs[phy_word << 2]); > > +#ifdef CONFIG_MX7ULP > + if (readl(®s->out_status) & BM_OUT_STATUS_DED) { > + writel(BM_OUT_STATUS_DED, ®s->out_status_clr); > + printf("mxc_ocotp %s(): fuse read wrong\n", __func__); > + return -EIO; > + } > +#endif > return finish_access(regs, __func__); > } > > @@ -238,6 +258,12 @@ static void set_timing(struct ocotp_regs *regs) > clrsetbits_le32(®s->timing, BM_TIMING_FSOURCE | BM_TIMING_PROG, > timing); > } > +#elif defined(CONFIG_MX7ULP) > +static void set_timing(struct ocotp_regs *regs) > +{ > + /* No timing set for MX7ULP */ > +} > + > #else > static void set_timing(struct ocotp_regs *regs) > { > @@ -302,6 +328,14 @@ int fuse_sense(u32 bank, u32 word, u32 *val) > *val = readl(®s->read_fuse_data); > #endif > > +#ifdef CONFIG_MX7ULP > + if (readl(®s->out_status) & BM_OUT_STATUS_DED) { > + writel(BM_OUT_STATUS_DED, ®s->out_status_clr); > + printf("mxc_ocotp %s(): fuse read wrong\n", __func__); > + return -EIO; > + } > +#endif > + > return finish_access(regs, __func__); > } > > @@ -355,6 +389,14 @@ int fuse_prog(u32 bank, u32 word, u32 val) > #endif > udelay(WRITE_POSTAMBLE_US); > > +#ifdef CONFIG_MX7ULP > + if (readl(®s->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) { > + writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), ®s->out_status_clr); > + printf("mxc_ocotp %s(): fuse write is failed\n", __func__); > + return -EIO; > + } > +#endif > + > return finish_access(regs, __func__); > } > > @@ -374,5 +416,13 @@ int fuse_override(u32 bank, u32 word, u32 val) > > writel(val, ®s->bank[phy_bank].fuse_regs[phy_word << 2]); > > +#ifdef CONFIG_MX7ULP > + if (readl(®s->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) { > + writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), ®s->out_status_clr); > + printf("mxc_ocotp %s(): fuse write is failed\n", __func__); > + return -EIO; > + } > +#endif > + > return finish_access(regs, __func__); > } > Reviewed-by : Stefano Babic <sbabic@denx.de> Best regards, Stefano Babic
diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 539d34b..732b692 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -38,6 +38,8 @@ #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL)) #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL)) +#define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP)) + u32 get_nr_cpus(void); u32 get_cpu_rev(void); u32 get_cpu_speed_grade_hz(void); diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c index 0b1c050..88610d6 100644 --- a/drivers/misc/mxc_ocotp.c +++ b/drivers/misc/mxc_ocotp.c @@ -29,6 +29,12 @@ #ifdef CONFIG_MX7 #define BM_CTRL_ADDR 0x0000000f #define BM_CTRL_RELOAD 0x00000400 +#elif defined(CONFIG_MX7ULP) +#define BM_CTRL_ADDR 0x000000FF +#define BM_CTRL_RELOAD 0x00000400 +#define BM_OUT_STATUS_DED 0x00000400 +#define BM_OUT_STATUS_LOCKED 0x00000800 +#define BM_OUT_STATUS_PROGFAIL 0x00001000 #else #define BM_CTRL_ADDR 0x0000007f #endif @@ -70,6 +76,9 @@ #elif defined CONFIG_MX7 #define FUSE_BANK_SIZE 0x40 #define FUSE_BANKS 16 +#elif defined(CONFIG_MX7ULP) +#define FUSE_BANK_SIZE 0x80 +#define FUSE_BANKS 31 #else #error "Unsupported architecture\n" #endif @@ -98,7 +107,7 @@ u32 fuse_bank_physical(int index) { u32 phy_index; - if (is_mx6sl()) { + if (is_mx6sl() || is_mx7ulp()) { phy_index = index; } else if (is_mx6ul() || is_mx6ull() || is_mx6sll()) { if ((is_mx6ull() || is_mx6sll()) && index == 8) @@ -187,6 +196,10 @@ static int finish_access(struct ocotp_regs *regs, const char *caller) err = !!(readl(®s->ctrl) & BM_CTRL_ERROR); clear_error(regs); +#ifdef CONFIG_MX7ULP + /* Need to power down the OTP memory */ + writel(1, ®s->pdn); +#endif if (err) { printf("mxc_ocotp %s(): Access protect error\n", caller); return -EIO; @@ -217,6 +230,13 @@ int fuse_read(u32 bank, u32 word, u32 *val) *val = readl(®s->bank[phy_bank].fuse_regs[phy_word << 2]); +#ifdef CONFIG_MX7ULP + if (readl(®s->out_status) & BM_OUT_STATUS_DED) { + writel(BM_OUT_STATUS_DED, ®s->out_status_clr); + printf("mxc_ocotp %s(): fuse read wrong\n", __func__); + return -EIO; + } +#endif return finish_access(regs, __func__); } @@ -238,6 +258,12 @@ static void set_timing(struct ocotp_regs *regs) clrsetbits_le32(®s->timing, BM_TIMING_FSOURCE | BM_TIMING_PROG, timing); } +#elif defined(CONFIG_MX7ULP) +static void set_timing(struct ocotp_regs *regs) +{ + /* No timing set for MX7ULP */ +} + #else static void set_timing(struct ocotp_regs *regs) { @@ -302,6 +328,14 @@ int fuse_sense(u32 bank, u32 word, u32 *val) *val = readl(®s->read_fuse_data); #endif +#ifdef CONFIG_MX7ULP + if (readl(®s->out_status) & BM_OUT_STATUS_DED) { + writel(BM_OUT_STATUS_DED, ®s->out_status_clr); + printf("mxc_ocotp %s(): fuse read wrong\n", __func__); + return -EIO; + } +#endif + return finish_access(regs, __func__); } @@ -355,6 +389,14 @@ int fuse_prog(u32 bank, u32 word, u32 val) #endif udelay(WRITE_POSTAMBLE_US); +#ifdef CONFIG_MX7ULP + if (readl(®s->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) { + writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), ®s->out_status_clr); + printf("mxc_ocotp %s(): fuse write is failed\n", __func__); + return -EIO; + } +#endif + return finish_access(regs, __func__); } @@ -374,5 +416,13 @@ int fuse_override(u32 bank, u32 word, u32 val) writel(val, ®s->bank[phy_bank].fuse_regs[phy_word << 2]); +#ifdef CONFIG_MX7ULP + if (readl(®s->out_status) & (BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED)) { + writel((BM_OUT_STATUS_PROGFAIL | BM_OUT_STATUS_LOCKED), ®s->out_status_clr); + printf("mxc_ocotp %s(): fuse write is failed\n", __func__); + return -EIO; + } +#endif + return finish_access(regs, __func__); }