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[RFC,2/6] Documetation: samsung-phy: add the exynos-pcie-phy binding

Message ID 20161226052029.10552-3-jh80.chung@samsung.com
State Superseded
Headers show

Commit Message

Jaehoon Chung Dec. 26, 2016, 5:20 a.m. UTC 
Adds the exynos-pcie-phy binding for Exynos PCIe PHY.
This is for using generic PHY framework.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
---
 .../devicetree/bindings/phy/samsung-phy.txt         | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
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Patch

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index 9872ba8..eb1085e 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -191,3 +191,24 @@  Example:
 		usbdrdphy0 = &usb3_phy0;
 		usbdrdphy1 = &usb3_phy1;
 	};
+
+Samsung Exynos SoC series PCIe PHY controller
+--------------------------------------------------
+Required properties:
+- compatible : Should be set to "samsung,exynos5433-pcie-phy"
+- #phy-cells : must be zero
+- reg : a list of registers usd by phy driver
+
+Optional properites:
+-samsung,pmureg-phandle	- handle to syscon used to control PMU registers
+-samsung,fsys-sysreg	- handle to syscon used to control the system registers
+
+Example:
+	pcie_phy: pcie-phy@15680000 {
+		#phy-cells = <0>;
+		compatible = "samsung,exynos5433-pcie-phy";
+		reg = <0x15680000 0x1000>;
+		samsung,pmureg-phandle = <&pmu_system_controller>;
+		samsung,fsys-sysreg = <&syscon_fsys>;
+		status = "okay";
+	};