Patchwork [6/8] ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point

login
register
mail settings
Submitter Peter Maydell
Date Nov. 11, 2010, 6:24 p.m.
Message ID <1289499842-28818-7-git-send-email-peter.maydell@linaro.org>
Download mbox | patch
Permalink /patch/70852/
State New
Headers show

Comments

Peter Maydell - Nov. 11, 2010, 6:24 p.m.
VCVT of 16 bit fixed point to float should ignore the top 16 bits
of the source register. Cast to int16_t and friends rather than
int16 -- the former is guaranteed exactly 16 bits wide where the
latter is merely at least 16 bits wide (and so is usually 32 bits).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/helper.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Patch

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 628094f..66648d8 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2558,7 +2558,7 @@  float32 VFP_HELPER(fcvts, d)(float64 x, CPUState *env)
 ftype VFP_HELPER(name##to, p)(ftype x, uint32_t shift, CPUState *env) \
 { \
     ftype tmp; \
-    tmp = sign##int32_to_##ftype ((itype)vfp_##p##toi(x), \
+    tmp = sign##int32_to_##ftype ((itype##_t)vfp_##p##toi(x), \
                                   &env->vfp.fp_status); \
     return ftype##_scalbn(tmp, -(int)shift, &env->vfp.fp_status); \
 } \