| Message ID | 1482304990-23942-3-git-send-email-john@phrozen.org |
|---|---|
| State | Changes Requested |
| Delegated to: | Cyrille Pitchen |
| Headers | show |
On 12/21/2016 08:23 AM, John Crispin wrote: > From: André Valentin <avalentin@marcant.net> > > This patch adds support for a new macronix spi flash chip. We have had this > patch inside our tree for a while and people are actively using routers > with this chip. > > Signed-off-by: John Crispin <john@phrozen.org> > Signed-off-by: André Valentin <avalentin@marcant.net> > --- > Changes in V2 > * add description > * add SECT_4K > * fix indenting Are you SURE this chip can do sect_4k ? The datasheet seems to imply that, but I wonder why it wasn't in V1 of this patch then ? Esp. if people are actively using this chip ... > drivers/mtd/spi-nor/spi-nor.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index 171adb3..bfff159 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, > { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, > { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >
On 21/12/2016 08:33, Marek Vasut wrote: > On 12/21/2016 08:23 AM, John Crispin wrote: >> From: André Valentin <avalentin@marcant.net> >> >> This patch adds support for a new macronix spi flash chip. We have had this >> patch inside our tree for a while and people are actively using routers >> with this chip. >> >> Signed-off-by: John Crispin <john@phrozen.org> >> Signed-off-by: André Valentin <avalentin@marcant.net> >> --- >> Changes in V2 >> * add description >> * add SECT_4K >> * fix indenting > > Are you SURE this chip can do sect_4k ? The datasheet seems to imply > that, but I wonder why it wasn't in V1 of this patch then ? Esp. if > people are actively using this chip ... i checked the datasheet just now and it says 4K sectors are supported. generally we cannot runtime test every patch that we receive but need to rely on the testing of the submitter. lets see what André has to say. John > >> drivers/mtd/spi-nor/spi-nor.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >> index 171adb3..bfff159 100644 >> --- a/drivers/mtd/spi-nor/spi-nor.c >> +++ b/drivers/mtd/spi-nor/spi-nor.c >> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) >> { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, >> + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, >> { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, >> { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >> > >
Hi! I took these values from the manufacturer SDK (Qualcomm). I could not detect any problems with the setting. Kind regards, André Am 21.12.2016 um 08:33 schrieb Marek Vasut: > On 12/21/2016 08:23 AM, John Crispin wrote: >> From: André Valentin <avalentin@marcant.net> >> >> This patch adds support for a new macronix spi flash chip. We have had this >> patch inside our tree for a while and people are actively using routers >> with this chip. >> >> Signed-off-by: John Crispin <john@phrozen.org> >> Signed-off-by: André Valentin <avalentin@marcant.net> >> --- >> Changes in V2 >> * add description >> * add SECT_4K >> * fix indenting > > Are you SURE this chip can do sect_4k ? The datasheet seems to imply > that, but I wonder why it wasn't in V1 of this patch then ? Esp. if > people are actively using this chip ... > >> drivers/mtd/spi-nor/spi-nor.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >> index 171adb3..bfff159 100644 >> --- a/drivers/mtd/spi-nor/spi-nor.c >> +++ b/drivers/mtd/spi-nor/spi-nor.c >> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) >> { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, >> + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, >> { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, >> { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >> > >
Hi André could you test if it also works when enabling SECT_4K please ? John On 21/12/2016 09:11, André Valentin wrote: > Hi! > > I took these values from the manufacturer SDK (Qualcomm). I could not detect any problems with the setting. > > Kind regards, > > André > > Am 21.12.2016 um 08:33 schrieb Marek Vasut: >> On 12/21/2016 08:23 AM, John Crispin wrote: >>> From: André Valentin <avalentin@marcant.net> >>> >>> This patch adds support for a new macronix spi flash chip. We have had this >>> patch inside our tree for a while and people are actively using routers >>> with this chip. >>> >>> Signed-off-by: John Crispin <john@phrozen.org> >>> Signed-off-by: André Valentin <avalentin@marcant.net> >>> --- >>> Changes in V2 >>> * add description >>> * add SECT_4K >>> * fix indenting >> >> Are you SURE this chip can do sect_4k ? The datasheet seems to imply >> that, but I wonder why it wasn't in V1 of this patch then ? Esp. if >> people are actively using this chip ... >> >>> drivers/mtd/spi-nor/spi-nor.c | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >>> index 171adb3..bfff159 100644 >>> --- a/drivers/mtd/spi-nor/spi-nor.c >>> +++ b/drivers/mtd/spi-nor/spi-nor.c >>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) >>> { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, >>> { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, >>> { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, >>> + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, >>> { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, >>> { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, >>> { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >>> >> >> >
On 12/21/2016 09:18 AM, John Crispin wrote: > Hi André > > could you test if it also works when enabling SECT_4K please ? Yes, please test, thanks. btw please do stop top-posting. > John > > On 21/12/2016 09:11, André Valentin wrote: >> Hi! >> >> I took these values from the manufacturer SDK (Qualcomm). I could not detect any problems with the setting. >> >> Kind regards, >> >> André >> >> Am 21.12.2016 um 08:33 schrieb Marek Vasut: >>> On 12/21/2016 08:23 AM, John Crispin wrote: >>>> From: André Valentin <avalentin@marcant.net> >>>> >>>> This patch adds support for a new macronix spi flash chip. We have had this >>>> patch inside our tree for a while and people are actively using routers >>>> with this chip. >>>> >>>> Signed-off-by: John Crispin <john@phrozen.org> >>>> Signed-off-by: André Valentin <avalentin@marcant.net> >>>> --- >>>> Changes in V2 >>>> * add description >>>> * add SECT_4K >>>> * fix indenting >>> >>> Are you SURE this chip can do sect_4k ? The datasheet seems to imply >>> that, but I wonder why it wasn't in V1 of this patch then ? Esp. if >>> people are actively using this chip ... >>> >>>> drivers/mtd/spi-nor/spi-nor.c | 1 + >>>> 1 file changed, 1 insertion(+) >>>> >>>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >>>> index 171adb3..bfff159 100644 >>>> --- a/drivers/mtd/spi-nor/spi-nor.c >>>> +++ b/drivers/mtd/spi-nor/spi-nor.c >>>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) >>>> { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, >>>> { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, >>>> { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, >>>> + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, >>>> { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, >>>> { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, >>>> { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >>>> >>> >>> >>
On 21/12/2016 11:07, Marek Vasut wrote: > On 12/21/2016 09:18 AM, John Crispin wrote: >> Hi André >> >> could you test if it also works when enabling SECT_4K please ? > > Yes, please test, thanks. > > btw please do stop top-posting. > >> John >> Sorry about top posting. André will need a bit of time to test so i will send a V3 with only the other 2 patches included today and then send this patch later once tested. John
Hi all, Le 21/12/2016 à 08:23, John Crispin a écrit : > From: André Valentin <avalentin@marcant.net> > > This patch adds support for a new macronix spi flash chip. We have had this > patch inside our tree for a while and people are actively using routers > with this chip. > > Signed-off-by: John Crispin <john@phrozen.org> > Signed-off-by: André Valentin <avalentin@marcant.net> > --- > Changes in V2 > * add description > * add SECT_4K > * fix indenting > > drivers/mtd/spi-nor/spi-nor.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index 171adb3..bfff159 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, According to its datasheet, the Macronix MX25U3235F also supports Fast Read 1-1-2 (3Bh) and Fast Read 1-1-4 (EBh) hence the SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags should be set as well. Best regards, Cyrille > { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, > { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, > { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >
On 21/12/2016 11:27, Cyrille Pitchen wrote: > Hi all, > > Le 21/12/2016 à 08:23, John Crispin a écrit : >> From: André Valentin <avalentin@marcant.net> >> >> This patch adds support for a new macronix spi flash chip. We have had this >> patch inside our tree for a while and people are actively using routers >> with this chip. >> >> Signed-off-by: John Crispin <john@phrozen.org> >> Signed-off-by: André Valentin <avalentin@marcant.net> >> --- >> Changes in V2 >> * add description >> * add SECT_4K >> * fix indenting >> >> drivers/mtd/spi-nor/spi-nor.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >> index 171adb3..bfff159 100644 >> --- a/drivers/mtd/spi-nor/spi-nor.c >> +++ b/drivers/mtd/spi-nor/spi-nor.c >> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) >> { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, >> { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, >> + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, > > According to its datasheet, the Macronix MX25U3235F also supports Fast Read > 1-1-2 (3Bh) and Fast Read 1-1-4 (EBh) hence the SPI_NOR_DUAL_READ > and SPI_NOR_QUAD_READ flags should be set as well. > > Best regards, > > Cyrille Hi Cyrille, thanks for the help, I'll update the patches and get the original submitters to test them before resending the series John > >> { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, >> { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, >> { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >> >
Le 21/12/2016 à 14:16, John Crispin a écrit : > > > On 21/12/2016 11:27, Cyrille Pitchen wrote: >> Hi all, >> >> Le 21/12/2016 à 08:23, John Crispin a écrit : >>> From: André Valentin <avalentin@marcant.net> >>> >>> This patch adds support for a new macronix spi flash chip. We have had this >>> patch inside our tree for a while and people are actively using routers >>> with this chip. >>> >>> Signed-off-by: John Crispin <john@phrozen.org> >>> Signed-off-by: André Valentin <avalentin@marcant.net> >>> --- >>> Changes in V2 >>> * add description >>> * add SECT_4K >>> * fix indenting >>> >>> drivers/mtd/spi-nor/spi-nor.c | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >>> index 171adb3..bfff159 100644 >>> --- a/drivers/mtd/spi-nor/spi-nor.c >>> +++ b/drivers/mtd/spi-nor/spi-nor.c >>> @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) >>> { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, >>> { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, >>> { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, >>> + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, >> >> According to its datasheet, the Macronix MX25U3235F also supports Fast Read >> 1-1-2 (3Bh) and Fast Read 1-1-4 (EBh) hence the SPI_NOR_DUAL_READ >> and SPI_NOR_QUAD_READ flags should be set as well. >> >> Best regards, >> >> Cyrille > > Hi Cyrille, > > thanks for the help, I'll update the patches and get the original > submitters to test them before resending the series > > John > If they could test easily it's always a good thing. For 4K erase it should be pretty straight forward but for dual and quad fast reads it depends on the SPI controller hardware capabilities, whether the IO2 and IO3 lines are physically connected to the relevant memory pins... So if it is too difficult to find a proper board to do the tests, just tell us :) Anyway, with Macronix memories, we don't take that much risk setting the dual/quad flags referring only to the datasheet. For instance, we already know that the Fast Read 1-y-4 commands work with Macronix mx25l25673g, so it's very likely to work the same with mx25u*35f parts. Still reading the datasheet, I've already checked the number of dummy cycles needed with the factory settings: 8 dummy clock cycles (mode cycles included) for both Fast Read 1-1-4 and Fast Read 1-1-2. Best regards, Cyrille >> >>> { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, >>> { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, >>> { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >>> >> >
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 171adb3..bfff159 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -868,6 +868,7 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, + { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, SECT_4K) }, { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },