[v3,2/3] USB3/DWC3: Add property "snps, incr-burst-type-adjustment" for INCR burst type
diff mbox

Message ID 1482139554-13618-2-git-send-email-jerry.huang@nxp.com
State Changes Requested, archived
Headers show

Commit Message

jerry.huang@nxp.com Dec. 19, 2016, 9:25 a.m. UTC
New property "snps,incr-burst-type-adjustment = <x>, <y>" for USB3.0 DWC3.
Field "x": 1/0 - undefined length INCR burst type enable or not;
Field "y": INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 burst type.

While enabling undefined length INCR burst type and INCR16 burst type,
get better write performance on NXP Layerscape platform:
around 3% improvement (from 364MB/s to 375MB/s).

Signed-off-by: Changming Huang <jerry.huang@nxp.com>
---
Changes in v3:
  - add new property for INCR burst in usb node.

 Documentation/devicetree/bindings/usb/dwc3.txt |    5 +++++
 arch/arm/boot/dts/ls1021a.dtsi                 |    1 +
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    3 +++
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |    2 ++
 4 files changed, 11 insertions(+)

Comments

Rob Herring Dec. 22, 2016, 6:45 p.m. UTC | #1
On Mon, Dec 19, 2016 at 05:25:53PM +0800, Changming Huang wrote:
> New property "snps,incr-burst-type-adjustment = <x>, <y>" for USB3.0 DWC3.
> Field "x": 1/0 - undefined length INCR burst type enable or not;
> Field "y": INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 burst type.
> 
> While enabling undefined length INCR burst type and INCR16 burst type,
> get better write performance on NXP Layerscape platform:
> around 3% improvement (from 364MB/s to 375MB/s).
> 
> Signed-off-by: Changming Huang <jerry.huang@nxp.com>
> ---
> Changes in v3:
>   - add new property for INCR burst in usb node.
> 
>  Documentation/devicetree/bindings/usb/dwc3.txt |    5 +++++
>  arch/arm/boot/dts/ls1021a.dtsi                 |    1 +
>  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    3 +++
>  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |    2 ++
>  4 files changed, 11 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
> index e3e6983..8c405a3 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> @@ -55,6 +55,10 @@ Optional properties:
>  	fladj_30mhz_sdbnd signal is invalid or incorrect.
>  
>   - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated.
> + - snps,incr-burst-type-adjustment: Value for INCR burst type of GSBUSCFG0
> +	register, undefined length INCR burst type enable and INCRx type.
> +	First field is for undefined length INCR burst type enable or not.
> +	Second field is for largest INCRx type enabled.

Why do you need the first field? Is the 2nd field used if the 1st is 0? 
If not, then just use the presence of the property to enable or not.

Rob
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jerry.huang@nxp.com Dec. 23, 2016, 2:52 a.m. UTC | #2
Hi, Rob,
> -----Original Message-----
> From: Rob Herring [mailto:robh@kernel.org]
> Sent: Friday, December 23, 2016 2:45 AM
> To: Jerry Huang <jerry.huang@nxp.com>
> Cc: balbi@kernel.org; mark.rutland@arm.com; catalin.marinas@arm.com;
> will.deacon@arm.com; linux@armlinux.org.uk; devicetree@vger.kernel.org;
> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org
> Subject: Re: [PATCH v3 2/3] USB3/DWC3: Add property "snps, incr-burst-
> type-adjustment" for INCR burst type
> 
> On Mon, Dec 19, 2016 at 05:25:53PM +0800, Changming Huang wrote:
> > New property "snps,incr-burst-type-adjustment = <x>, <y>" for USB3.0
> DWC3.
> > Field "x": 1/0 - undefined length INCR burst type enable or not; Field
> > "y": INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 burst type.
> >
> > While enabling undefined length INCR burst type and INCR16 burst type,
> > get better write performance on NXP Layerscape platform:
> > around 3% improvement (from 364MB/s to 375MB/s).
> >
> > Signed-off-by: Changming Huang <jerry.huang@nxp.com>
> > ---
> > Changes in v3:
> >   - add new property for INCR burst in usb node.
> >
> >  Documentation/devicetree/bindings/usb/dwc3.txt |    5 +++++
> >  arch/arm/boot/dts/ls1021a.dtsi                 |    1 +
> >  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    3 +++
> >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |    2 ++
> >  4 files changed, 11 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
> > b/Documentation/devicetree/bindings/usb/dwc3.txt
> > index e3e6983..8c405a3 100644
> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> > @@ -55,6 +55,10 @@ Optional properties:
> >  	fladj_30mhz_sdbnd signal is invalid or incorrect.
> >
> >   - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be
> reallocated.
> > + - snps,incr-burst-type-adjustment: Value for INCR burst type of
> GSBUSCFG0
> > +	register, undefined length INCR burst type enable and INCRx type.
> > +	First field is for undefined length INCR burst type enable or not.
> > +	Second field is for largest INCRx type enabled.
> 
> Why do you need the first field? Is the 2nd field used if the 1st is 0?
> If not, then just use the presence of the property to enable or not.
The first field is one switch.
When it is 1, means undefined length INCR burst type enabled, we can use any length less than or equal to the largest-enabled burst length of INCR4/8/16/32/64/128/256. 
When it is zero, means INCRx burst mode enabled, we can use one fixed burst length of 1/4/8/16/32/64/128/256 byte.
So, the 2nd field is used if the 1st is 0, we need to select one largest burst length the USB controller can support.
If we don't want to change the value of this register (use the default value), we don't need to add this property to usb node.
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Rob Herring Jan. 3, 2017, 9:23 p.m. UTC | #3
On Thu, Dec 22, 2016 at 8:52 PM, Jerry Huang <jerry.huang@nxp.com> wrote:
> Hi, Rob,
>> -----Original Message-----
>> From: Rob Herring [mailto:robh@kernel.org]
>> Sent: Friday, December 23, 2016 2:45 AM
>> To: Jerry Huang <jerry.huang@nxp.com>
>> Cc: balbi@kernel.org; mark.rutland@arm.com; catalin.marinas@arm.com;
>> will.deacon@arm.com; linux@armlinux.org.uk; devicetree@vger.kernel.org;
>> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>> kernel@lists.infradead.org
>> Subject: Re: [PATCH v3 2/3] USB3/DWC3: Add property "snps, incr-burst-
>> type-adjustment" for INCR burst type
>>
>> On Mon, Dec 19, 2016 at 05:25:53PM +0800, Changming Huang wrote:
>> > New property "snps,incr-burst-type-adjustment = <x>, <y>" for USB3.0
>> DWC3.
>> > Field "x": 1/0 - undefined length INCR burst type enable or not; Field
>> > "y": INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 burst type.
>> >
>> > While enabling undefined length INCR burst type and INCR16 burst type,
>> > get better write performance on NXP Layerscape platform:
>> > around 3% improvement (from 364MB/s to 375MB/s).
>> >
>> > Signed-off-by: Changming Huang <jerry.huang@nxp.com>
>> > ---
>> > Changes in v3:
>> >   - add new property for INCR burst in usb node.
>> >
>> >  Documentation/devicetree/bindings/usb/dwc3.txt |    5 +++++
>> >  arch/arm/boot/dts/ls1021a.dtsi                 |    1 +
>> >  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    3 +++
>> >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |    2 ++
>> >  4 files changed, 11 insertions(+)
>> >
>> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
>> > b/Documentation/devicetree/bindings/usb/dwc3.txt
>> > index e3e6983..8c405a3 100644
>> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
>> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
>> > @@ -55,6 +55,10 @@ Optional properties:
>> >     fladj_30mhz_sdbnd signal is invalid or incorrect.
>> >
>> >   - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be
>> reallocated.
>> > + - snps,incr-burst-type-adjustment: Value for INCR burst type of
>> GSBUSCFG0
>> > +   register, undefined length INCR burst type enable and INCRx type.
>> > +   First field is for undefined length INCR burst type enable or not.
>> > +   Second field is for largest INCRx type enabled.
>>
>> Why do you need the first field? Is the 2nd field used if the 1st is 0?
>> If not, then just use the presence of the property to enable or not.
> The first field is one switch.
> When it is 1, means undefined length INCR burst type enabled, we can use any length less than or equal to the largest-enabled burst length of INCR4/8/16/32/64/128/256.
> When it is zero, means INCRx burst mode enabled, we can use one fixed burst length of 1/4/8/16/32/64/128/256 byte.
> So, the 2nd field is used if the 1st is 0, we need to select one largest burst length the USB controller can support.
> If we don't want to change the value of this register (use the default value), we don't need to add this property to usb node.

Just make this a single value with 0 meaning INCR and 4/8/16/etc being INCRx.

Rob
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jerry.huang@nxp.com Jan. 4, 2017, 2:24 a.m. UTC | #4
Hi, Rob,

> -----Original Message-----

> From: Rob Herring [mailto:robh@kernel.org]

> Sent: Wednesday, January 04, 2017 5:24 AM

> To: Jerry Huang <jerry.huang@nxp.com>

> Cc: balbi@kernel.org; mark.rutland@arm.com; catalin.marinas@arm.com;

> will.deacon@arm.com; linux@armlinux.org.uk; devicetree@vger.kernel.org;

> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-

> kernel@lists.infradead.org

> Subject: Re: [PATCH v3 2/3] USB3/DWC3: Add property "snps, incr-burst-

> type-adjustment" for INCR burst type

> 

> On Thu, Dec 22, 2016 at 8:52 PM, Jerry Huang <jerry.huang@nxp.com> wrote:

> > Hi, Rob,

> >> -----Original Message-----

> >> From: Rob Herring [mailto:robh@kernel.org]

> >> Sent: Friday, December 23, 2016 2:45 AM

> >> To: Jerry Huang <jerry.huang@nxp.com>

> >> Cc: balbi@kernel.org; mark.rutland@arm.com; catalin.marinas@arm.com;

> >> will.deacon@arm.com; linux@armlinux.org.uk;

> >> devicetree@vger.kernel.org; linux-usb@vger.kernel.org;

> >> linux-kernel@vger.kernel.org; linux-arm- kernel@lists.infradead.org

> >> Subject: Re: [PATCH v3 2/3] USB3/DWC3: Add property "snps,

> >> incr-burst- type-adjustment" for INCR burst type

> >>

> >> On Mon, Dec 19, 2016 at 05:25:53PM +0800, Changming Huang wrote:

> >> > New property "snps,incr-burst-type-adjustment = <x>, <y>" for

> >> > USB3.0

> >> DWC3.

> >> > Field "x": 1/0 - undefined length INCR burst type enable or not;

> >> > Field

> >> > "y": INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 burst type.

> >> >

> >> > While enabling undefined length INCR burst type and INCR16 burst

> >> > type, get better write performance on NXP Layerscape platform:

> >> > around 3% improvement (from 364MB/s to 375MB/s).

> >> >

> >> > Signed-off-by: Changming Huang <jerry.huang@nxp.com>

> >> > ---

> >> > Changes in v3:

> >> >   - add new property for INCR burst in usb node.

> >> >

> >> >  Documentation/devicetree/bindings/usb/dwc3.txt |    5 +++++

> >> >  arch/arm/boot/dts/ls1021a.dtsi                 |    1 +

> >> >  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    3 +++

> >> >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |    2 ++

> >> >  4 files changed, 11 insertions(+)

> >> >

> >> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt

> >> > b/Documentation/devicetree/bindings/usb/dwc3.txt

> >> > index e3e6983..8c405a3 100644

> >> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt

> >> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt

> >> > @@ -55,6 +55,10 @@ Optional properties:

> >> >     fladj_30mhz_sdbnd signal is invalid or incorrect.

> >> >

> >> >   - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be

> >> reallocated.

> >> > + - snps,incr-burst-type-adjustment: Value for INCR burst type of

> >> GSBUSCFG0

> >> > +   register, undefined length INCR burst type enable and INCRx type.

> >> > +   First field is for undefined length INCR burst type enable or not.

> >> > +   Second field is for largest INCRx type enabled.

> >>

> >> Why do you need the first field? Is the 2nd field used if the 1st is 0?

> >> If not, then just use the presence of the property to enable or not.

> > The first field is one switch.

> > When it is 1, means undefined length INCR burst type enabled, we can use

> any length less than or equal to the largest-enabled burst length of

> INCR4/8/16/32/64/128/256.

> > When it is zero, means INCRx burst mode enabled, we can use one fixed

> burst length of 1/4/8/16/32/64/128/256 byte.

> > So, the 2nd field is used if the 1st is 0, we need to select one largest burst

> length the USB controller can support.

> > If we don't want to change the value of this register (use the default value),

> we don't need to add this property to usb node.

> 

> Just make this a single value with 0 meaning INCR and 4/8/16/etc being INCRx.

Maybe, I didn't describe it clearly. 
According to DWC3 spec, the value "0" of field INCRBrstEna means INCRx burst mode, 1 means INCR burst mode.
Regardless of the value of INCRBrstEna [bit0], we need to modify the other field bit[1,2,3,4,5,6,7] to one INCR burst type  for the platform supported.
Ad you mentioned, if we just use a single value with 0 meaning INCR and 4/8/16/etc being INCRx.
I understand totally that when it is none-zero, we can use it for INCR burst mode. 
Then, when it is 0, how to select the INCRx value?

So, I think we still need two vaue to specify INCRBrstEna and INCRx burst type.
Felipe Balbi Jan. 16, 2017, 8:50 a.m. UTC | #5
Hi,

Jerry Huang <jerry.huang@nxp.com> writes:
>> > On Thu, Dec 22, 2016 at 8:52 PM, Jerry Huang <jerry.huang@nxp.com>
>> wrote:
>> > > Hi, Rob,
>> > >> -----Original Message-----
>> > >> From: Rob Herring [mailto:robh@kernel.org]
>> > >> Sent: Friday, December 23, 2016 2:45 AM
>> > >> To: Jerry Huang <jerry.huang@nxp.com>
>> > >> Cc: balbi@kernel.org; mark.rutland@arm.com;
>> > >> catalin.marinas@arm.com; will.deacon@arm.com;
>> > >> linux@armlinux.org.uk; devicetree@vger.kernel.org;
>> > >> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>> > >> kernel@lists.infradead.org
>> > >> Subject: Re: [PATCH v3 2/3] USB3/DWC3: Add property "snps,
>> > >> incr-burst- type-adjustment" for INCR burst type
>> > >>
>> > >> On Mon, Dec 19, 2016 at 05:25:53PM +0800, Changming Huang wrote:
>> > >> > New property "snps,incr-burst-type-adjustment = <x>, <y>" for
>> > >> > USB3.0
>> > >> DWC3.
>> > >> > Field "x": 1/0 - undefined length INCR burst type enable or not;
>> > >> > Field
>> > >> > "y": INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 burst
>> type.
>> > >> >
>> > >> > While enabling undefined length INCR burst type and INCR16 burst
>> > >> > type, get better write performance on NXP Layerscape platform:
>> > >> > around 3% improvement (from 364MB/s to 375MB/s).
>> > >> >
>> > >> > Signed-off-by: Changming Huang <jerry.huang@nxp.com>
>> > >> > ---
>> > >> > Changes in v3:
>> > >> >   - add new property for INCR burst in usb node.
>> > >> >
>> > >> >  Documentation/devicetree/bindings/usb/dwc3.txt |    5 +++++
>> > >> >  arch/arm/boot/dts/ls1021a.dtsi                 |    1 +
>> > >> >  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    3 +++
>> > >> >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |    2 ++
>> > >> >  4 files changed, 11 insertions(+)
>> > >> >
>> > >> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
>> > >> > b/Documentation/devicetree/bindings/usb/dwc3.txt
>> > >> > index e3e6983..8c405a3 100644
>> > >> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
>> > >> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
>> > >> > @@ -55,6 +55,10 @@ Optional properties:
>> > >> >     fladj_30mhz_sdbnd signal is invalid or incorrect.
>> > >> >
>> > >> >   - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to
>> > >> > be
>> > >> reallocated.
>> > >> > + - snps,incr-burst-type-adjustment: Value for INCR burst type of
>> > >> GSBUSCFG0
>> > >> > +   register, undefined length INCR burst type enable and INCRx type.
>> > >> > +   First field is for undefined length INCR burst type enable or not.
>> > >> > +   Second field is for largest INCRx type enabled.
>> > >>
>> > >> Why do you need the first field? Is the 2nd field used if the 1st is 0?
>> > >> If not, then just use the presence of the property to enable or not.
>> > > The first field is one switch.
>> > > When it is 1, means undefined length INCR burst type enabled, we can
>> > > use
>> > any length less than or equal to the largest-enabled burst length of
>> > INCR4/8/16/32/64/128/256.
>> > > When it is zero, means INCRx burst mode enabled, we can use one
>> > > fixed
>> > burst length of 1/4/8/16/32/64/128/256 byte.
>> > > So, the 2nd field is used if the 1st is 0, we need to select one
>> > > largest burst
>> > length the USB controller can support.
>> > > If we don't want to change the value of this register (use the
>> > > default value),
>> > we don't need to add this property to usb node.
>> >
>> > Just make this a single value with 0 meaning INCR and 4/8/16/etc being
>> INCRx.
>> Maybe, I didn't describe it clearly.
>> According to DWC3 spec, the value "0" of field INCRBrstEna means INCRx
>> burst mode, 1 means INCR burst mode.
>> Regardless of the value of INCRBrstEna [bit0], we need to modify the other
>> field bit[1,2,3,4,5,6,7] to one INCR burst type  for the platform supported.
>> Ad you mentioned, if we just use a single value with 0 meaning INCR and
>> 4/8/16/etc being INCRx.
>> I understand totally that when it is none-zero, we can use it for INCR burst
>> mode.
>> Then, when it is 0, how to select the INCRx value?
>> 
>> So, I think we still need two vaue to specify INCRBrstEna and INCRx burst
>> type.
> Hi, Balbi, 
> It seems there is no feedback for my comment, so these patches can be accepted?

probably not, we need to really understand what information we need so
it can be described properly. The last thing we want is unnecessary DT
properties.

It seems to me that we can extrapolate INCRBrstEna based on which burst
modes are enabled. If only 0 is passed, then that bit should be 1, if 0
and any other size is passed, then that bit should be 0, no?
jerry.huang@nxp.com Jan. 17, 2017, 10:37 a.m. UTC | #6
> -----Original Message-----
> From: Felipe Balbi [mailto:balbi@kernel.org]
> Sent: Monday, January 16, 2017 4:50 PM
> To: Jerry Huang <jerry.huang@nxp.com>; Rob Herring <robh@kernel.org>
> Cc: mark.rutland@arm.com; catalin.marinas@arm.com;
> will.deacon@arm.com; linux@armlinux.org.uk; devicetree@vger.kernel.org;
> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org
> Subject: RE: [PATCH v3 2/3] USB3/DWC3: Add property "snps, incr-burst-
> type-adjustment" for INCR burst type
> 
> 
> Hi,
> 
> Jerry Huang <jerry.huang@nxp.com> writes:
> >> > On Thu, Dec 22, 2016 at 8:52 PM, Jerry Huang <jerry.huang@nxp.com>
> >> wrote:
> >> > > Hi, Rob,
> >> > >> -----Original Message-----
> >> > >> From: Rob Herring [mailto:robh@kernel.org]
> >> > >> Sent: Friday, December 23, 2016 2:45 AM
> >> > >> To: Jerry Huang <jerry.huang@nxp.com>
> >> > >> Cc: balbi@kernel.org; mark.rutland@arm.com;
> >> > >> catalin.marinas@arm.com; will.deacon@arm.com;
> >> > >> linux@armlinux.org.uk; devicetree@vger.kernel.org;
> >> > >> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org;
> >> > >> linux-arm- kernel@lists.infradead.org
> >> > >> Subject: Re: [PATCH v3 2/3] USB3/DWC3: Add property "snps,
> >> > >> incr-burst- type-adjustment" for INCR burst type
> >> > >>
> >> > >> On Mon, Dec 19, 2016 at 05:25:53PM +0800, Changming Huang wrote:
> >> > >> > New property "snps,incr-burst-type-adjustment = <x>, <y>" for
> >> > >> > USB3.0
> >> > >> DWC3.
> >> > >> > Field "x": 1/0 - undefined length INCR burst type enable or
> >> > >> > not; Field
> >> > >> > "y": INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 burst
> >> type.
> >> > >> >
> >> > >> > While enabling undefined length INCR burst type and INCR16
> >> > >> > burst type, get better write performance on NXP Layerscape
> platform:
> >> > >> > around 3% improvement (from 364MB/s to 375MB/s).
> >> > >> >
> >> > >> > Signed-off-by: Changming Huang <jerry.huang@nxp.com>
> >> > >> > ---
> >> > >> > Changes in v3:
> >> > >> >   - add new property for INCR burst in usb node.
> >> > >> >
> >> > >> >  Documentation/devicetree/bindings/usb/dwc3.txt |    5 +++++
> >> > >> >  arch/arm/boot/dts/ls1021a.dtsi                 |    1 +
> >> > >> >  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    3 +++
> >> > >> >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |    2 ++
> >> > >> >  4 files changed, 11 insertions(+)
> >> > >> >
> >> > >> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
> >> > >> > b/Documentation/devicetree/bindings/usb/dwc3.txt
> >> > >> > index e3e6983..8c405a3 100644
> >> > >> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> >> > >> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> >> > >> > @@ -55,6 +55,10 @@ Optional properties:
> >> > >> >     fladj_30mhz_sdbnd signal is invalid or incorrect.
> >> > >> >
> >> > >> >   - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has*
> >> > >> > to be
> >> > >> reallocated.
> >> > >> > + - snps,incr-burst-type-adjustment: Value for INCR burst type
> >> > >> > + of
> >> > >> GSBUSCFG0
> >> > >> > +   register, undefined length INCR burst type enable and INCRx
> type.
> >> > >> > +   First field is for undefined length INCR burst type enable or not.
> >> > >> > +   Second field is for largest INCRx type enabled.
> >> > >>
> >> > >> Why do you need the first field? Is the 2nd field used if the 1st is 0?
> >> > >> If not, then just use the presence of the property to enable or not.
> >> > > The first field is one switch.
> >> > > When it is 1, means undefined length INCR burst type enabled, we
> >> > > can use
> >> > any length less than or equal to the largest-enabled burst length
> >> > of INCR4/8/16/32/64/128/256.
> >> > > When it is zero, means INCRx burst mode enabled, we can use one
> >> > > fixed
> >> > burst length of 1/4/8/16/32/64/128/256 byte.
> >> > > So, the 2nd field is used if the 1st is 0, we need to select one
> >> > > largest burst
> >> > length the USB controller can support.
> >> > > If we don't want to change the value of this register (use the
> >> > > default value),
> >> > we don't need to add this property to usb node.
> >> >
> >> > Just make this a single value with 0 meaning INCR and 4/8/16/etc
> >> > being
> >> INCRx.
> >> Maybe, I didn't describe it clearly.
> >> According to DWC3 spec, the value "0" of field INCRBrstEna means
> >> INCRx burst mode, 1 means INCR burst mode.
> >> Regardless of the value of INCRBrstEna [bit0], we need to modify the
> >> other field bit[1,2,3,4,5,6,7] to one INCR burst type  for the platform
> supported.
> >> Ad you mentioned, if we just use a single value with 0 meaning INCR
> >> and 4/8/16/etc being INCRx.
> >> I understand totally that when it is none-zero, we can use it for
> >> INCR burst mode.
> >> Then, when it is 0, how to select the INCRx value?
> >>
> >> So, I think we still need two vaue to specify INCRBrstEna and INCRx
> >> burst type.
> > Hi, Balbi,
> > It seems there is no feedback for my comment, so these patches can be
> accepted?
> 
> probably not, we need to really understand what information we need so it
> can be described properly. The last thing we want is unnecessary DT
> properties.
> 
> It seems to me that we can extrapolate INCRBrstEna based on which burst
> modes are enabled. If only 0 is passed, then that bit should be 1, if 0 and any
> other size is passed, then that bit should be 0, no?
Hi, Balbi,
Below is the definition for this property,
snps,incr-burst-type-adjustment = <x>, <y>
x: Undefined Length INCR Burst Type Enable (INCRBrstEna)
    0 - INCRX burst mode (not enable INCRBrstEna)
    1 - INCR (undefined length) burst mode (enable INCRBrstEna)
y: the burst length

1> if x = 0: means INCRBrstEna not enabled, set bit0 to zero (or clear it) , we select one of INCR1/INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 (pass this value through "y")to set the fix burst length controller supported.
For example:
snps,incr-burst-type-adjustment = <0>, <16>
driver will set bit0 to zero and set bit3 to 1 (INCR16 Burst Type Enabled), controller will use INCR16 (with 16 bytes) to transfer data.

2> if x = 1: means INCRBrstEna enabled, we select one of INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 (pass this value through "y") to set the burst length, and controller will use any length less than or equal to that we selected.
For example:
snps,incr-burst-type-adjustment = <1>, <32>
driver will set bit0 to 1 and set bit4 to 1 (INCR32 Burst Type Enabled), controller will use any burst length less than (such as 4, 8, 16 byte) or equal to 32 byte to transfer data.

Therefore, I think this two fileds are needed. Do you think about it?

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Felipe Balbi Jan. 17, 2017, 10:45 a.m. UTC | #7
Hi,

Jerry Huang <jerry.huang@nxp.com> writes:

<snip>

>> >> So, I think we still need two vaue to specify INCRBrstEna and INCRx
>> >> burst type.
>> > Hi, Balbi,
>> > It seems there is no feedback for my comment, so these patches can be
>> accepted?
>> 
>> probably not, we need to really understand what information we need so it
>> can be described properly. The last thing we want is unnecessary DT
>> properties.
>> 
>> It seems to me that we can extrapolate INCRBrstEna based on which burst
>> modes are enabled. If only 0 is passed, then that bit should be 1, if 0 and any
>> other size is passed, then that bit should be 0, no?
> Hi, Balbi,
> Below is the definition for this property,
> snps,incr-burst-type-adjustment = <x>, <y>
> x: Undefined Length INCR Burst Type Enable (INCRBrstEna)
>     0 - INCRX burst mode (not enable INCRBrstEna)
>     1 - INCR (undefined length) burst mode (enable INCRBrstEna)
> y: the burst length
>
> 1> if x = 0: means INCRBrstEna not enabled, set bit0 to zero (or clear
> it) , we select one of
> INCR1/INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 (pass this
> value through "y")to set the fix burst length controller supported.
>
> For example:
>
> 	snps,incr-burst-type-adjustment = <0>, <16>
>
> driver will set bit0 to zero and set bit3 to 1 (INCR16 Burst Type
> Enabled), controller will use INCR16 (with 16 bytes) to transfer data.
>
> 2> if x = 1: means INCRBrstEna enabled, we select one of
> INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 (pass this value
> through "y") to set the burst length, and controller will use any
> length less than or equal to that we selected.
>
> For example:
>
> 	snps,incr-burst-type-adjustment = <1>, <32>
>
> driver will set bit0 to 1 and set bit4 to 1 (INCR32 Burst Type
> Enabled), controller will use any burst length less than (such as 4,
> 8, 16 byte) or equal to 32 byte to transfer data.
>
> Therefore, I think this two fileds are needed. Do you think about it?

no, I don't think two values are needed, because first value can be
extrapolated from the second. Something like this:

	snps,incr-burst-type-adjustment = <4>, <8>, <16>, <32>;

This is basically telling us that we can support anything in this
list. So INCRBrstEna should be set to 1.

If DT, on the other hand, says:

	snps,incr-burst-type-adjustment = <32>;

this means that we can only support INCR32, so INCRBrstEna should be
cleared to 0.
jerry.huang@nxp.com Jan. 17, 2017, 11:08 a.m. UTC | #8
> -----Original Message-----
> From: Felipe Balbi [mailto:balbi@kernel.org]
> Sent: Tuesday, January 17, 2017 6:45 PM
> To: Jerry Huang <jerry.huang@nxp.com>; Rob Herring <robh@kernel.org>
> Cc: mark.rutland@arm.com; catalin.marinas@arm.com;
> will.deacon@arm.com; linux@armlinux.org.uk; devicetree@vger.kernel.org;
> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org
> Subject: RE: [PATCH v3 2/3] USB3/DWC3: Add property "snps, incr-burst-
> type-adjustment" for INCR burst type
> 
> 
> Hi,
> 
> Jerry Huang <jerry.huang@nxp.com> writes:
> 
> <snip>
> 
> >> >> So, I think we still need two vaue to specify INCRBrstEna and
> >> >> INCRx burst type.
> >> > Hi, Balbi,
> >> > It seems there is no feedback for my comment, so these patches can
> >> > be
> >> accepted?
> >>
> >> probably not, we need to really understand what information we need
> >> so it can be described properly. The last thing we want is
> >> unnecessary DT properties.
> >>
> >> It seems to me that we can extrapolate INCRBrstEna based on which
> >> burst modes are enabled. If only 0 is passed, then that bit should be
> >> 1, if 0 and any other size is passed, then that bit should be 0, no?
> > Hi, Balbi,
> > Below is the definition for this property,
> > snps,incr-burst-type-adjustment = <x>, <y>
> > x: Undefined Length INCR Burst Type Enable (INCRBrstEna)
> >     0 - INCRX burst mode (not enable INCRBrstEna)
> >     1 - INCR (undefined length) burst mode (enable INCRBrstEna)
> > y: the burst length
> >
> > 1> if x = 0: means INCRBrstEna not enabled, set bit0 to zero (or clear
> > it) , we select one of
> > INCR1/INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 (pass this
> > value through "y")to set the fix burst length controller supported.
> >
> > For example:
> >
> > 	snps,incr-burst-type-adjustment = <0>, <16>
> >
> > driver will set bit0 to zero and set bit3 to 1 (INCR16 Burst Type
> > Enabled), controller will use INCR16 (with 16 bytes) to transfer data.
> >
> > 2> if x = 1: means INCRBrstEna enabled, we select one of
> > INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 (pass this value
> > through "y") to set the burst length, and controller will use any
> > length less than or equal to that we selected.
> >
> > For example:
> >
> > 	snps,incr-burst-type-adjustment = <1>, <32>
> >
> > driver will set bit0 to 1 and set bit4 to 1 (INCR32 Burst Type
> > Enabled), controller will use any burst length less than (such as 4,
> > 8, 16 byte) or equal to 32 byte to transfer data.
> >
> > Therefore, I think this two fileds are needed. Do you think about it?
> 
> no, I don't think two values are needed, because first value can be
> extrapolated from the second. Something like this:
> 
> 	snps,incr-burst-type-adjustment = <4>, <8>, <16>, <32>;
> 
> This is basically telling us that we can support anything in this list. So
> INCRBrstEna should be set to 1.
> 
> If DT, on the other hand, says:
> 
> 	snps,incr-burst-type-adjustment = <32>;
> 
> this means that we can only support INCR32, so INCRBrstEna should be
> cleared to 0.
Got it, I will try this mode.
Thanks a lot, Balbi,

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Rob Herring Jan. 21, 2017, 8:21 p.m. UTC | #9
On Tue, Jan 3, 2017 at 8:24 PM, Jerry Huang <jerry.huang@nxp.com> wrote:
> Hi, Rob,
>
>> -----Original Message-----
>> From: Rob Herring [mailto:robh@kernel.org]
>> Sent: Wednesday, January 04, 2017 5:24 AM
>> To: Jerry Huang <jerry.huang@nxp.com>
>> Cc: balbi@kernel.org; mark.rutland@arm.com; catalin.marinas@arm.com;
>> will.deacon@arm.com; linux@armlinux.org.uk; devicetree@vger.kernel.org;
>> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
>> kernel@lists.infradead.org
>> Subject: Re: [PATCH v3 2/3] USB3/DWC3: Add property "snps, incr-burst-
>> type-adjustment" for INCR burst type
>>
>> On Thu, Dec 22, 2016 at 8:52 PM, Jerry Huang <jerry.huang@nxp.com> wrote:
>> > Hi, Rob,
>> >> -----Original Message-----
>> >> From: Rob Herring [mailto:robh@kernel.org]
>> >> Sent: Friday, December 23, 2016 2:45 AM
>> >> To: Jerry Huang <jerry.huang@nxp.com>
>> >> Cc: balbi@kernel.org; mark.rutland@arm.com; catalin.marinas@arm.com;
>> >> will.deacon@arm.com; linux@armlinux.org.uk;
>> >> devicetree@vger.kernel.org; linux-usb@vger.kernel.org;
>> >> linux-kernel@vger.kernel.org; linux-arm- kernel@lists.infradead.org
>> >> Subject: Re: [PATCH v3 2/3] USB3/DWC3: Add property "snps,
>> >> incr-burst- type-adjustment" for INCR burst type
>> >>
>> >> On Mon, Dec 19, 2016 at 05:25:53PM +0800, Changming Huang wrote:
>> >> > New property "snps,incr-burst-type-adjustment = <x>, <y>" for
>> >> > USB3.0
>> >> DWC3.
>> >> > Field "x": 1/0 - undefined length INCR burst type enable or not;
>> >> > Field
>> >> > "y": INCR4/INCR8/INCR16/INCR32/INCR64/INCR128/INCR256 burst type.
>> >> >
>> >> > While enabling undefined length INCR burst type and INCR16 burst
>> >> > type, get better write performance on NXP Layerscape platform:
>> >> > around 3% improvement (from 364MB/s to 375MB/s).
>> >> >
>> >> > Signed-off-by: Changming Huang <jerry.huang@nxp.com>
>> >> > ---
>> >> > Changes in v3:
>> >> >   - add new property for INCR burst in usb node.
>> >> >
>> >> >  Documentation/devicetree/bindings/usb/dwc3.txt |    5 +++++
>> >> >  arch/arm/boot/dts/ls1021a.dtsi                 |    1 +
>> >> >  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |    3 +++
>> >> >  arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |    2 ++
>> >> >  4 files changed, 11 insertions(+)
>> >> >
>> >> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
>> >> > b/Documentation/devicetree/bindings/usb/dwc3.txt
>> >> > index e3e6983..8c405a3 100644
>> >> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
>> >> > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
>> >> > @@ -55,6 +55,10 @@ Optional properties:
>> >> >     fladj_30mhz_sdbnd signal is invalid or incorrect.
>> >> >
>> >> >   - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be
>> >> reallocated.
>> >> > + - snps,incr-burst-type-adjustment: Value for INCR burst type of
>> >> GSBUSCFG0
>> >> > +   register, undefined length INCR burst type enable and INCRx type.
>> >> > +   First field is for undefined length INCR burst type enable or not.
>> >> > +   Second field is for largest INCRx type enabled.
>> >>
>> >> Why do you need the first field? Is the 2nd field used if the 1st is 0?
>> >> If not, then just use the presence of the property to enable or not.
>> > The first field is one switch.
>> > When it is 1, means undefined length INCR burst type enabled, we can use
>> any length less than or equal to the largest-enabled burst length of
>> INCR4/8/16/32/64/128/256.
>> > When it is zero, means INCRx burst mode enabled, we can use one fixed
>> burst length of 1/4/8/16/32/64/128/256 byte.
>> > So, the 2nd field is used if the 1st is 0, we need to select one largest burst
>> length the USB controller can support.
>> > If we don't want to change the value of this register (use the default value),
>> we don't need to add this property to usb node.
>>
>> Just make this a single value with 0 meaning INCR and 4/8/16/etc being INCRx.
> Maybe, I didn't describe it clearly.
> According to DWC3 spec, the value "0" of field INCRBrstEna means INCRx burst mode, 1 means INCR burst mode.
> Regardless of the value of INCRBrstEna [bit0], we need to modify the other field bit[1,2,3,4,5,6,7] to one INCR burst type  for the platform supported.
> Ad you mentioned, if we just use a single value with 0 meaning INCR and 4/8/16/etc being INCRx.
> I understand totally that when it is none-zero, we can use it for INCR burst mode.
> Then, when it is 0, how to select the INCRx value?

What I mean is:
<no prop> - burst disabled
0 - INCR burst. INCR is undefined length burst IIRC.
4/8/16/etc. - INCR4/INCR8/INCR16/etc.

What case does this not cover?

Rob
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jerry.huang@nxp.com Feb. 10, 2017, 3:16 p.m. UTC | #10
> >> >> Why do you need the first field? Is the 2nd field used if the 1st is 0?

> >> >> If not, then just use the presence of the property to enable or not.

> >> > The first field is one switch.

> >> > When it is 1, means undefined length INCR burst type enabled, we

> >> > can use

> >> any length less than or equal to the largest-enabled burst length of

> >> INCR4/8/16/32/64/128/256.

> >> > When it is zero, means INCRx burst mode enabled, we can use one

> >> > fixed

> >> burst length of 1/4/8/16/32/64/128/256 byte.

> >> > So, the 2nd field is used if the 1st is 0, we need to select one

> >> > largest burst

> >> length the USB controller can support.

> >> > If we don't want to change the value of this register (use the

> >> > default value),

> >> we don't need to add this property to usb node.

> >>

> >> Just make this a single value with 0 meaning INCR and 4/8/16/etc being

> INCRx.

> > Maybe, I didn't describe it clearly.

> > According to DWC3 spec, the value "0" of field INCRBrstEna means INCRx

> burst mode, 1 means INCR burst mode.

> > Regardless of the value of INCRBrstEna [bit0], we need to modify the other

> field bit[1,2,3,4,5,6,7] to one INCR burst type  for the platform supported.

> > Ad you mentioned, if we just use a single value with 0 meaning INCR and

> 4/8/16/etc being INCRx.

> > I understand totally that when it is none-zero, we can use it for INCR burst

> mode.

> > Then, when it is 0, how to select the INCRx value?

> 

> What I mean is:

> <no prop> - burst disabled

Yes, I understand it.
> 0 - INCR burst. INCR is undefined length burst IIRC.

When INCR is undefined length, we need to set the max INCR type, too, such as when setting INCR16, controller can use any length less than or equal to the 16 byte.
> 4/8/16/etc. - INCR4/INCR8/INCR16/etc.

I understand it, too.
> 

> What case does this not cover?

According to Balbi's suggestion, I changed the property like below, you can see the detail in v4 (sent by 1/18/2017)
Property "snps,incr-burst-type-adjustment = <x>, <y>..." for USB3.0 DWC3.
When Just one value means INCRx mode with fix burst type.
When more than one value, means undefined length burst mode, USB controller can use the length less than or equal to the largest enabled burst length.

Patch
diff mbox

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index e3e6983..8c405a3 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -55,6 +55,10 @@  Optional properties:
 	fladj_30mhz_sdbnd signal is invalid or incorrect.
 
  - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated.
+ - snps,incr-burst-type-adjustment: Value for INCR burst type of GSBUSCFG0
+	register, undefined length INCR burst type enable and INCRx type.
+	First field is for undefined length INCR burst type enable or not.
+	Second field is for largest INCRx type enabled.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
@@ -63,4 +67,5 @@  dwc3@4a030000 {
 	reg = <0x4a030000 0xcfff>;
 	interrupts = <0 92 4>
 	usb-phy = <&usb2_phy>, <&usb3,phy>;
+	snps,incr-burst-type-adjustment = <0x1>, <16>;
 };
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 368e219..2999edb 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -627,6 +627,7 @@ 
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			snps,incr-burst-type-adjustment = <0x1>, <16>;
 		};
 
 		pcie@3400000 {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 97d331e..64828ce 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -482,6 +482,7 @@ 
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			snps,incr-burst-type-adjustment = <0x1>, <16>;
 		};
 
 		usb1: usb3@3000000 {
@@ -491,6 +492,7 @@ 
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			snps,incr-burst-type-adjustment = <0x1>, <16>;
 		};
 
 		usb2: usb3@3100000 {
@@ -500,6 +502,7 @@ 
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			snps,incr-burst-type-adjustment = <0x1>, <16>;
 		};
 
 		sata: sata@3200000 {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index d058e56..414af27 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -710,6 +710,7 @@ 
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			snps,incr-burst-type-adjustment = <0x1>, <16>;
 		};
 
 		usb1: usb3@3110000 {
@@ -720,6 +721,7 @@ 
 			dr_mode = "host";
 			snps,quirk-frame-length-adjustment = <0x20>;
 			snps,dis_rxdet_inp3_quirk;
+			snps,incr-burst-type-adjustment = <0x1>, <16>;
 		};
 
 		ccn@4000000 {