diff mbox

[U-Boot,RESEND,v2] powerpc: Retain compatible property for L2 cache

Message ID 20161219072631.26904-1-judge.packham@gmail.com
State Not Applicable
Headers show

Commit Message

Chris Packham Dec. 19, 2016, 7:26 a.m. UTC 
When setting the compatible property for the L2 cache ensure that we
follow the documented binding by setting both
"<chip>-l2-cache-controller" and "cache" as values.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
---

Changes in v2:
- extract a helper function to set the compatible property and use it in
  both the CONFIG_L2_CACHE and CONFIG_BACKSIDE_L2_CACHE cases.

 arch/powerpc/cpu/mpc85xx/fdt.c | 61 +++++++++++++++++++++++++-----------------
 1 file changed, 36 insertions(+), 25 deletions(-)

Comments

York Sun Dec. 19, 2016, 5:14 p.m. UTC | #1 
On 12/18/2016 11:26 PM, Chris Packham wrote:
> When setting the compatible property for the L2 cache ensure that we
> follow the documented binding by setting both
> "<chip>-l2-cache-controller" and "cache" as values.
>
> Signed-off-by: Chris Packham <judge.packham@gmail.com>
> ---
>
> Changes in v2:
> - extract a helper function to set the compatible property and use it in
>   both the CONFIG_L2_CACHE and CONFIG_BACKSIDE_L2_CACHE cases.

I guess you meant to remind me about this patch. It is not forgotten. 
Actually it is in my test queue. I planned to merge it after another 
round of 85xx Kconfig change. I will see if I can merge this one sooner.

York
Chris Packham Dec. 20, 2016, 7:38 a.m. UTC | #2 
Hi York,

On Tue, Dec 20, 2016 at 6:14 AM, york sun <york.sun@nxp.com> wrote:
> On 12/18/2016 11:26 PM, Chris Packham wrote:
>> When setting the compatible property for the L2 cache ensure that we
>> follow the documented binding by setting both
>> "<chip>-l2-cache-controller" and "cache" as values.
>>
>> Signed-off-by: Chris Packham <judge.packham@gmail.com>
>> ---
>>
>> Changes in v2:
>> - extract a helper function to set the compatible property and use it in
>>   both the CONFIG_L2_CACHE and CONFIG_BACKSIDE_L2_CACHE cases.
>
> I guess you meant to remind me about this patch. It is not forgotten.
> Actually it is in my test queue. I planned to merge it after another
> round of 85xx Kconfig change. I will see if I can merge this one sooner.
>

Yes. It was mainly because I saw a pull request for mpc85xx and I
hadn't seen any feedback (positive or negative) on the most recent
change set. No need to accelerate your process if it's in the queue.
diff mbox

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 12001f85e9fd..67140ba9ee18 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -180,6 +180,39 @@  static inline void ft_fixup_l3cache(void *blob, int off)
 #define ft_fixup_l3cache(x, y)
 #endif
 
+#if defined(CONFIG_L2_CACHE) || \
+	defined(CONFIG_BACKSIDE_L2_CACHE) || \
+	defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
+static inline void ft_fixup_l2cache_compatible(void *blob, int off)
+{
+	int len;
+	struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
+
+	if (cpu) {
+		char buf[40];
+
+		if (isdigit(cpu->name[0])) {
+			/* MPCxxxx, where xxxx == 4-digit number */
+			len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
+				cpu->name) + 1;
+		} else {
+			/* Pxxxx or Txxxx, where xxxx == 4-digit number */
+			len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
+			tolower(cpu->name[0]), cpu->name + 1) + 1;
+		}
+
+		/*
+		 * append "cache" after the NULL character that the previous
+		 * sprintf wrote.  This is how a device tree stores multiple
+		 * strings in a property.
+		 */
+		len += sprintf(buf + len, "cache") + 1;
+
+		fdt_setprop(blob, off, "compatible", buf, len);
+	}
+}
+#endif
+
 #if defined(CONFIG_L2_CACHE)
 /* return size in kilobytes */
 static inline u32 l2cache_size(void)
@@ -215,9 +248,8 @@  static inline u32 l2cache_size(void)
 
 static inline void ft_fixup_l2cache(void *blob)
 {
-	int len, off;
+	int off;
 	u32 *ph;
-	struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
 
 	const u32 line_size = 32;
 	const u32 num_ways = 8;
@@ -243,28 +275,7 @@  static inline void ft_fixup_l2cache(void *blob)
 		return ;
 	}
 
-	if (cpu) {
-		char buf[40];
-
-		if (isdigit(cpu->name[0])) {
-			/* MPCxxxx, where xxxx == 4-digit number */
-			len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
-				cpu->name) + 1;
-		} else {
-			/* Pxxxx or Txxxx, where xxxx == 4-digit number */
-			len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
-				tolower(cpu->name[0]), cpu->name + 1) + 1;
-		}
-
-		/*
-		 * append "cache" after the NULL character that the previous
-		 * sprintf wrote.  This is how a device tree stores multiple
-		 * strings in a property.
-		 */
-		len += sprintf(buf + len, "cache") + 1;
-
-		fdt_setprop(blob, off, "compatible", buf, len);
-	}
+	ft_fixup_l2cache_compatible(blob, off);
 	fdt_setprop(blob, off, "cache-unified", NULL, 0);
 	fdt_setprop_cell(blob, off, "cache-block-size", line_size);
 	fdt_setprop_cell(blob, off, "cache-size", size);
@@ -337,7 +348,7 @@  static inline void ft_fixup_l2cache(void *blob)
 			fdt_setprop_cell(blob, l2_off, "cache-size", size);
 			fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
 			fdt_setprop_cell(blob, l2_off, "cache-level", 2);
-			fdt_setprop(blob, l2_off, "compatible", "cache", 6);
+			ft_fixup_l2cache_compatible(blob, l2_off);
 		}
 
 		if (l3_off < 0) {