From patchwork Mon Nov 8 15:31:58 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joern Rennecke X-Patchwork-Id: 70425 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id D5795B710A for ; Tue, 9 Nov 2010 02:32:10 +1100 (EST) Received: (qmail 27255 invoked by alias); 8 Nov 2010 15:32:08 -0000 Received: (qmail 27233 invoked by uid 22791); 8 Nov 2010 15:32:07 -0000 X-SWARE-Spam-Status: No, hits=-2.5 required=5.0 tests=AWL, BAYES_00, MIME_QP_LONG_LINE, RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from c60.cesmail.net (HELO c60.cesmail.net) (216.154.195.49) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 08 Nov 2010 15:31:59 +0000 Received: from unknown (HELO delta2) ([192.168.1.50]) by c60.cesmail.net with ESMTP; 08 Nov 2010 10:31:58 -0500 Received: from 89.241.145.145 ([89.241.145.145]) by webmail.spamcop.net (Horde MIME library) with HTTP; Mon, 08 Nov 2010 10:31:58 -0500 Message-ID: <20101108103158.s79crfo7gooo0o44-nzlynne@webmail.spamcop.net> Date: Mon, 08 Nov 2010 10:31:58 -0500 From: Joern Rennecke To: gcc-patches@gcc.gnu.org Subject: RFA: Fix lm32 --enable-werror-always build MIME-Version: 1.0 User-Agent: Internet Messaging Program (IMP) H3 (4.1.4) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org cross-built on i686-pc-linux-gnu with gcc (GCC) 4.6.0 20101103 (experimental). 2010-11-08 Joern Rennecke PR target/44757 * config/lm32/lm32.h (LEGITIMATE_CONSTANT_P): Call lm32_legitimate_constant_p. * config/lm32/lm32.md (ashlsi3): Remove unused variable. * config/lm32/lm32.c (gen_int_relational): Declare variables at start of block. (lm32_block_move_inline): Use XALLOCAVEC. Index: config/lm32/lm32.h =================================================================== --- config/lm32/lm32.h (revision 166429) +++ config/lm32/lm32.h (working copy) @@ -350,7 +350,7 @@ enum reg_class #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P(X) #endif -#define LEGITIMATE_CONSTANT_P(X) lm32_legitimate_constant_p +#define LEGITIMATE_CONSTANT_P(X) lm32_legitimate_constant_p (X) /*-------------------------*/ /* Condition Code Status. */ Index: config/lm32/lm32.md =================================================================== --- config/lm32/lm32.md (revision 166429) +++ config/lm32/lm32.md (working copy) @@ -824,7 +824,6 @@ (define_expand "ashlsi3" { int i; int shifts = INTVAL (operands[2]); - rtx one = GEN_INT (1); if (shifts == 0) emit_move_insn (operands[0], operands[1]); Index: config/lm32/lm32.c =================================================================== --- config/lm32/lm32.c (revision 166429) +++ config/lm32/lm32.c (working copy) @@ -187,12 +187,14 @@ gen_int_relational (enum rtx_code code, GE, GT. */ switch (code) { + rtx temp; + case LE: case LT: case LEU: case LTU: code = swap_condition (code); - rtx temp = cmp0; + temp = cmp0; cmp0 = cmp1; cmp1 = temp; break; @@ -202,7 +204,7 @@ gen_int_relational (enum rtx_code code, if (branch_p) { - rtx insn; + rtx insn, cond, label; /* Operands must be in registers. */ if (!register_operand (cmp0, mode)) @@ -211,8 +213,8 @@ gen_int_relational (enum rtx_code code, cmp1 = force_reg (mode, cmp1); /* Generate conditional branch instruction. */ - rtx cond = gen_rtx_fmt_ee (code, mode, cmp0, cmp1); - rtx label = gen_rtx_LABEL_REF (VOIDmode, destination); + cond = gen_rtx_fmt_ee (code, mode, cmp0, cmp1); + label = gen_rtx_LABEL_REF (VOIDmode, destination); insn = gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, cond, label, pc_rtx)); @@ -841,7 +843,7 @@ lm32_block_move_inline (rtx dest, rtx sr delta = bits / BITS_PER_UNIT; /* Allocate a buffer for the temporary registers. */ - regs = alloca (sizeof (rtx) * length / delta); + regs = XALLOCAVEC (rtx, length / delta); /* Load as many BITS-sized chunks as possible. */ for (offset = 0, i = 0; offset + delta <= length; offset += delta, i++)