Patchwork RFA: Fix lm32 --enable-werror-always build

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Submitter Joern Rennecke
Date Nov. 8, 2010, 3:31 p.m.
Message ID <20101108103158.s79crfo7gooo0o44-nzlynne@webmail.spamcop.net>
Download mbox | patch
Permalink /patch/70425/
State New
Headers show

Comments

Joern Rennecke - Nov. 8, 2010, 3:31 p.m.
cross-built on i686-pc-linux-gnu with gcc (GCC) 4.6.0 20101103 (experimental).
2010-11-08  Joern Rennecke  <amylaar@spamcop.net>

	PR target/44757 
	* config/lm32/lm32.h (LEGITIMATE_CONSTANT_P): Call
	lm32_legitimate_constant_p.
	* config/lm32/lm32.md (ashlsi3): Remove unused variable.
	* config/lm32/lm32.c (gen_int_relational): Declare variables at
	start of block.
	(lm32_block_move_inline): Use XALLOCAVEC.
Richard Henderson - Nov. 8, 2010, 7:27 p.m.
On 11/08/2010 07:31 AM, Joern Rennecke wrote:
>    switch (code)
>      {
> +      rtx temp;
> +
>      case LE:
>      case LT:
>      case LEU:
>      case LTU:
>        code = swap_condition (code);
> -      rtx temp = cmp0;
> +      temp = cmp0;
>        cmp0 = cmp1;
>        cmp1 = temp;
>        break;

I'd prefer to see a new block for the case, rather than
injecting into the switch block.  I.e.


  switch (code)
    {
    ...
    case LTU:
      {
	rtx temp;
	...
      }
      break;

Otherwise ok.


r~

Patch

Index: config/lm32/lm32.h
===================================================================
--- config/lm32/lm32.h	(revision 166429)
+++ config/lm32/lm32.h	(working copy)
@@ -350,7 +350,7 @@  enum reg_class
 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P(X)
 #endif
 
-#define LEGITIMATE_CONSTANT_P(X) lm32_legitimate_constant_p
+#define LEGITIMATE_CONSTANT_P(X) lm32_legitimate_constant_p (X)
 
 /*-------------------------*/
 /* Condition Code Status.  */
Index: config/lm32/lm32.md
===================================================================
--- config/lm32/lm32.md	(revision 166429)
+++ config/lm32/lm32.md	(working copy)
@@ -824,7 +824,6 @@  (define_expand "ashlsi3"
         {
           int i;
           int shifts = INTVAL (operands[2]);
-          rtx one = GEN_INT (1);
           
           if (shifts == 0)
             emit_move_insn (operands[0], operands[1]);
Index: config/lm32/lm32.c
===================================================================
--- config/lm32/lm32.c	(revision 166429)
+++ config/lm32/lm32.c	(working copy)
@@ -187,12 +187,14 @@  gen_int_relational (enum rtx_code code,	
      GE, GT.  */
   switch (code)
     {
+      rtx temp;
+
     case LE:
     case LT:
     case LEU:
     case LTU:
       code = swap_condition (code);
-      rtx temp = cmp0;
+      temp = cmp0;
       cmp0 = cmp1;
       cmp1 = temp;
       break;
@@ -202,7 +204,7 @@  gen_int_relational (enum rtx_code code,	
 
   if (branch_p)
     {
-      rtx insn;
+      rtx insn, cond, label;
 
       /* Operands must be in registers.  */
       if (!register_operand (cmp0, mode))
@@ -211,8 +213,8 @@  gen_int_relational (enum rtx_code code,	
 	cmp1 = force_reg (mode, cmp1);
 
       /* Generate conditional branch instruction.  */
-      rtx cond = gen_rtx_fmt_ee (code, mode, cmp0, cmp1);
-      rtx label = gen_rtx_LABEL_REF (VOIDmode, destination);
+      cond = gen_rtx_fmt_ee (code, mode, cmp0, cmp1);
+      label = gen_rtx_LABEL_REF (VOIDmode, destination);
       insn = gen_rtx_SET (VOIDmode, pc_rtx,
 			  gen_rtx_IF_THEN_ELSE (VOIDmode,
 						cond, label, pc_rtx));
@@ -841,7 +843,7 @@  lm32_block_move_inline (rtx dest, rtx sr
   delta = bits / BITS_PER_UNIT;
 
   /* Allocate a buffer for the temporary registers.  */
-  regs = alloca (sizeof (rtx) * length / delta);
+  regs = XALLOCAVEC (rtx, length / delta);
 
   /* Load as many BITS-sized chunks as possible.  */
   for (offset = 0, i = 0; offset + delta <= length; offset += delta, i++)