From patchwork Mon Nov 8 12:14:27 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Botcazou X-Patchwork-Id: 70414 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 04DEBB7105 for ; Mon, 8 Nov 2010 23:15:49 +1100 (EST) Received: (qmail 22382 invoked by alias); 8 Nov 2010 12:15:38 -0000 Received: (qmail 22245 invoked by uid 22791); 8 Nov 2010 12:15:32 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00,TW_FN X-Spam-Check-By: sourceware.org Received: from mel.act-europe.fr (HELO mel.act-europe.fr) (194.98.77.210) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 08 Nov 2010 12:15:25 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 7AAEACB02FF for ; Mon, 8 Nov 2010 13:15:23 +0100 (CET) Received: from mel.act-europe.fr ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uBivIe3br3JL for ; Mon, 8 Nov 2010 13:15:23 +0100 (CET) Received: from [192.168.1.2] (bon31-9-83-155-120-49.fbx.proxad.net [83.155.120.49]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mel.act-europe.fr (Postfix) with ESMTP id 4AD5CCB02F0 for ; Mon, 8 Nov 2010 13:15:23 +0100 (CET) From: Eric Botcazou To: gcc-patches@gcc.gnu.org Subject: [SPARC] Fix PR target/46208 (partially) Date: Mon, 8 Nov 2010 13:14:27 +0100 User-Agent: KMail/1.9.9 MIME-Version: 1.0 Message-Id: <201011081314.27820.ebotcazou@adacore.com> Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This removes TARGET_PROMOTE_PROTOTYPES for the SPARC, following: http://gcc.gnu.org/ml/gcc/2010-11/msg00072.html Bootstraped/regtested/compat-regtested on SPARC/Solaris 8, 9 and 10, applied on the mainline. 2010-11-08 Eric Botcazou PR target/46208 * config/sparc/sparc.c (TARGET_PROMOTE_PROTOTYPES): Delete. (sparc_promote_prototypes): Likewise. (sparc_promote_function_mode): Promote in 32-bit mode as well. (sparc_return_in_memory): Remove superfluous parentheses. (sparc_struct_value_rtx): Fix long lines. (sparc_function_value_1): Promote in 32-bit mode as well. Index: config/sparc/sparc.c =================================================================== --- config/sparc/sparc.c (revision 166172) +++ config/sparc/sparc.c (working copy) @@ -405,7 +405,6 @@ static rtx sparc_tls_got (void); static const char *get_some_local_dynamic_name (void); static int get_some_local_dynamic_name_1 (rtx *, void *); static bool sparc_rtx_costs (rtx, int, int, int *, bool); -static bool sparc_promote_prototypes (const_tree); static rtx sparc_function_value (const_tree, const_tree, bool); static rtx sparc_libcall_value (enum machine_mode, const_rtx); static bool sparc_function_value_regno_p (const unsigned int); @@ -554,9 +553,6 @@ static const struct default_options spar #undef TARGET_PROMOTE_FUNCTION_MODE #define TARGET_PROMOTE_FUNCTION_MODE sparc_promote_function_mode -#undef TARGET_PROMOTE_PROTOTYPES -#define TARGET_PROMOTE_PROTOTYPES sparc_promote_prototypes - #undef TARGET_FUNCTION_VALUE #define TARGET_FUNCTION_VALUE sparc_function_value #undef TARGET_LIBCALL_VALUE @@ -4909,15 +4905,6 @@ init_cumulative_args (struct sparc_args cum->libcall_p = fntype == 0; } -/* Handle the TARGET_PROMOTE_PROTOTYPES target hook. - When a prototype says `char' or `short', really pass an `int'. */ - -static bool -sparc_promote_prototypes (const_tree fntype ATTRIBUTE_UNUSED) -{ - return TARGET_ARCH32 ? true : false; -} - /* Handle promotion of pointer and integer arguments. */ static enum machine_mode @@ -4933,12 +4920,8 @@ sparc_promote_function_mode (const_tree return Pmode; } - /* For TARGET_ARCH64 we need this, as we don't have instructions - for arithmetic operations which do zero/sign extension at the same time, - so without this we end up with a srl/sra after every assignment to an - user variable, which means very very bad code. */ - if (TARGET_ARCH64 - && GET_MODE_CLASS (mode) == MODE_INT + /* Integral arguments are passed as full words, as per the ABI. */ + if (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE_SIZE (mode) < UNITS_PER_WORD) return word_mode; @@ -5959,8 +5942,8 @@ sparc_return_in_memory (const_tree type, integers are returned like floats of the same size, that is in registers. Return all vector floats like structure and unions; note that they always have BLKmode like the latter. */ - return ((TYPE_MODE (type) == BLKmode - && (unsigned HOST_WIDE_INT) int_size_in_bytes (type) > 32)); + return (TYPE_MODE (type) == BLKmode + && (unsigned HOST_WIDE_INT) int_size_in_bytes (type) > 32); } /* Handle the TARGET_STRUCT_VALUE target hook. @@ -6001,22 +5984,22 @@ sparc_struct_value_rtx (tree fndecl, int tree size = TYPE_SIZE_UNIT (TREE_TYPE (fndecl)); rtx size_rtx = GEN_INT (TREE_INT_CST_LOW (size) & 0xfff); /* Construct a temporary return value */ - rtx temp_val = assign_stack_local (Pmode, TREE_INT_CST_LOW (size), 0); + rtx temp_val + = assign_stack_local (Pmode, TREE_INT_CST_LOW (size), 0); - /* Implement SPARC 32-bit psABI callee returns struck checking - requirements: + /* Implement SPARC 32-bit psABI callee return struct checking: - Fetch the instruction where we will return to and see if + Fetch the instruction where we will return to and see if it's an unimp instruction (the most significant 10 bits will be zero). */ emit_move_insn (scratch, gen_rtx_MEM (SImode, plus_constant (ret_rtx, 8))); /* Assume the size is valid and pre-adjust */ emit_insn (gen_add3_insn (ret_rtx, ret_rtx, GEN_INT (4))); - emit_cmp_and_jump_insns (scratch, size_rtx, EQ, const0_rtx, SImode, 0, endlab); + emit_cmp_and_jump_insns (scratch, size_rtx, EQ, const0_rtx, SImode, + 0, endlab); emit_insn (gen_sub3_insn (ret_rtx, ret_rtx, GEN_INT (4))); - /* Assign stack temp: - Write the address of the memory pointed to by temp_val into + /* Write the address of the memory pointed to by temp_val into the memory pointed to by mem */ emit_move_insn (mem, XEXP (temp_val, 0)); emit_label (endlab); @@ -6107,12 +6090,19 @@ sparc_function_value_1 (const_tree type, mclass = MODE_INT; } - /* This must match sparc_promote_function_mode. - ??? Maybe 32-bit pointers should actually remain in Pmode? */ + /* We should only have pointer and integer types at this point. This + must match sparc_promote_function_mode. */ else if (mclass == MODE_INT && GET_MODE_SIZE (mode) < UNITS_PER_WORD) mode = word_mode; } + /* We should only have pointer and integer types at this point. This must + match sparc_promote_function_mode. */ + else if (TARGET_ARCH32 + && mclass == MODE_INT + && GET_MODE_SIZE (mode) < UNITS_PER_WORD) + mode = word_mode; + if ((mclass == MODE_FLOAT || mclass == MODE_COMPLEX_FLOAT) && TARGET_FPU) regno = SPARC_FP_ARG_FIRST; else @@ -6122,9 +6112,8 @@ sparc_function_value_1 (const_tree type, } /* Handle TARGET_FUNCTION_VALUE. - - On SPARC the value is found in the first "output" register, but the called - function leaves it in the first "input" register. */ + On the SPARC, the value is found in the first "output" register, but the + called function leaves it in the first "input" register. */ static rtx sparc_function_value (const_tree valtype, @@ -6143,9 +6132,9 @@ sparc_libcall_value (enum machine_mode m return sparc_function_value_1 (NULL_TREE, mode, false); } -/* Handle FUNCTION_VALUE_REGNO_P. - On SPARC, the first "output" reg is used for integer values, and - the first floating point register is used for floating point values. */ +/* Handle FUNCTION_VALUE_REGNO_P. + On the SPARC, the first "output" reg is used for integer values, and the + first floating point register is used for floating point values. */ static bool sparc_function_value_regno_p (const unsigned int regno)