diff mbox

[v1,7/9] target-ppc: implement xsnegqp instruction

Message ID 1481135102-20011-8-git-send-email-nikunj@linux.vnet.ibm.com
State New
Headers show

Commit Message

Nikunj A Dadhania Dec. 7, 2016, 6:25 p.m. UTC
xsnegqp: VSX Scalar Negate Quad-Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
---
 target-ppc/translate/vsx-impl.inc.c | 4 ++++
 target-ppc/translate/vsx-ops.inc.c  | 1 +
 2 files changed, 5 insertions(+)

Comments

David Gibson Dec. 8, 2016, 10:50 p.m. UTC | #1
On Wed, Dec 07, 2016 at 11:55:00PM +0530, Nikunj A Dadhania wrote:
> xsnegqp: VSX Scalar Negate Quad-Precision
> 
> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>

Merged to ppc-for-2.9.

> ---
>  target-ppc/translate/vsx-impl.inc.c | 4 ++++
>  target-ppc/translate/vsx-ops.inc.c  | 1 +
>  2 files changed, 5 insertions(+)
> 
> diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c
> index 6a81b2e..01b95df 100644
> --- a/target-ppc/translate/vsx-impl.inc.c
> +++ b/target-ppc/translate/vsx-impl.inc.c
> @@ -663,6 +663,9 @@ static void glue(gen_, name)(DisasContext *ctx)                   \
>      case OP_NABS:                                                 \
>          tcg_gen_or_i64(xbh, xbh, sgm);                            \
>          break;                                                    \
> +    case OP_NEG:                                                  \
> +        tcg_gen_xor_i64(xbh, xbh, sgm);                           \
> +        break;                                                    \
>      }                                                             \
>      tcg_gen_mov_i64(cpu_vsrh(xt), xbh);                           \
>      tcg_gen_mov_i64(cpu_vsrl(xt), xbl);                           \
> @@ -673,6 +676,7 @@ static void glue(gen_, name)(DisasContext *ctx)                   \
>  
>  VSX_SCALAR_MOVE_QP(xsabsqp, OP_ABS, SGN_MASK_DP)
>  VSX_SCALAR_MOVE_QP(xsnabsqp, OP_NABS, SGN_MASK_DP)
> +VSX_SCALAR_MOVE_QP(xsnegqp, OP_NEG, SGN_MASK_DP)
>  
>  #define VSX_VECTOR_MOVE(name, op, sgn_mask)                      \
>  static void glue(gen_, name)(DisasContext * ctx)                 \
> diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c
> index 0216efe..d798edb 100644
> --- a/target-ppc/translate/vsx-ops.inc.c
> +++ b/target-ppc/translate/vsx-ops.inc.c
> @@ -106,6 +106,7 @@ GEN_XX3FORM(xscpsgndp, 0x00, 0x16, PPC2_VSX),
>  
>  GEN_VSX_XFORM_300_EO(xsabsqp, 0x04, 0x19, 0x00, 0x00000001),
>  GEN_VSX_XFORM_300_EO(xsnabsqp, 0x04, 0x19, 0x08, 0x00000001),
> +GEN_VSX_XFORM_300_EO(xsnegqp, 0x04, 0x19, 0x10, 0x00000001),
>  
>  GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX),
>  GEN_XX2FORM(xvnabsdp, 0x12, 0x1E, PPC2_VSX),
diff mbox

Patch

diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c
index 6a81b2e..01b95df 100644
--- a/target-ppc/translate/vsx-impl.inc.c
+++ b/target-ppc/translate/vsx-impl.inc.c
@@ -663,6 +663,9 @@  static void glue(gen_, name)(DisasContext *ctx)                   \
     case OP_NABS:                                                 \
         tcg_gen_or_i64(xbh, xbh, sgm);                            \
         break;                                                    \
+    case OP_NEG:                                                  \
+        tcg_gen_xor_i64(xbh, xbh, sgm);                           \
+        break;                                                    \
     }                                                             \
     tcg_gen_mov_i64(cpu_vsrh(xt), xbh);                           \
     tcg_gen_mov_i64(cpu_vsrl(xt), xbl);                           \
@@ -673,6 +676,7 @@  static void glue(gen_, name)(DisasContext *ctx)                   \
 
 VSX_SCALAR_MOVE_QP(xsabsqp, OP_ABS, SGN_MASK_DP)
 VSX_SCALAR_MOVE_QP(xsnabsqp, OP_NABS, SGN_MASK_DP)
+VSX_SCALAR_MOVE_QP(xsnegqp, OP_NEG, SGN_MASK_DP)
 
 #define VSX_VECTOR_MOVE(name, op, sgn_mask)                      \
 static void glue(gen_, name)(DisasContext * ctx)                 \
diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c
index 0216efe..d798edb 100644
--- a/target-ppc/translate/vsx-ops.inc.c
+++ b/target-ppc/translate/vsx-ops.inc.c
@@ -106,6 +106,7 @@  GEN_XX3FORM(xscpsgndp, 0x00, 0x16, PPC2_VSX),
 
 GEN_VSX_XFORM_300_EO(xsabsqp, 0x04, 0x19, 0x00, 0x00000001),
 GEN_VSX_XFORM_300_EO(xsnabsqp, 0x04, 0x19, 0x08, 0x00000001),
+GEN_VSX_XFORM_300_EO(xsnegqp, 0x04, 0x19, 0x10, 0x00000001),
 
 GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX),
 GEN_XX2FORM(xvnabsdp, 0x12, 0x1E, PPC2_VSX),