diff mbox

, PR target/72717, Fix PowerPC abort in emit_move_insn from rs6000_expand_vector_init

Message ID 20161207054312.GA22122@ibm-tiger.the-meissners.org
State New
Headers show

Commit Message

Michael Meissner Dec. 7, 2016, 5:43 a.m. UTC 
This patch fixes an abort in vector initialization on ISA 2.07 (power8) and
above (it needs a vector long shift left, which was not in ISA 2.06).  A
V2DImode value was being initialized with two elements.  Each element has a
SImode SUBREG wrapped around a DImove value.  Force_reg was being called with a
mode of DImode, and within force_reg, it called emit_move_insn which complained
that the two modes weren't the same.

I added code to call convert_mode if the mode of the element wasn't the
expected mode.

I did a build on a little endian Power8 system and ran make check.  There were
no regressions.  Can I check it in the trunk?

The bug also shows up in GCC 6, and I would like to install it into GCC 6 as
well.

[gcc]
2016-12-06  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/72717
	* config/rs6000/rs6000.c (rs6000_expand_vector_init): If the
	V2DImode elements are SUBREG's convert the result into DImode
	rather than failing in emit_move_insn.

[gcc/testsuite]
2016-12-06  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/72717
	* gcc.target/powerpc/pr72717.c: New test.

Comments

Segher Boessenkool Dec. 7, 2016, 11:15 a.m. UTC | #1 
Hi Mike,

On Wed, Dec 07, 2016 at 12:43:12AM -0500, Michael Meissner wrote:
> I did a build on a little endian Power8 system and ran make check.  There were
> no regressions.  Can I check it in the trunk?
> 
> The bug also shows up in GCC 6, and I would like to install it into GCC 6 as
> well.

> Index: gcc/config/rs6000/rs6000.c
> ===================================================================
> --- gcc/config/rs6000/rs6000.c	(revision 243318)
> +++ gcc/config/rs6000/rs6000.c	(working copy)
> @@ -6891,25 +6891,43 @@ rs6000_expand_vector_init (rtx target, r
>    /* Double word values on VSX can use xxpermdi or lxvdsx.  */
>    if (VECTOR_MEM_VSX_P (mode) && (mode == V2DFmode || mode == V2DImode))
>      {
> -      rtx op0 = XVECEXP (vals, 0, 0);
> -      rtx op1 = XVECEXP (vals, 0, 1);
> +      rtx op[2];
> +      size_t i;
> +      size_t num_elements = (all_same) ? 1 : 2;

No parens here please.

Rest looks fine, please check in.  Okay for 6 too, after some delay
(making sure it works on BE and 32-bit and AIX, etc.)

Thanks,


Segher
diff mbox

Patch

Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 243318)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -6891,25 +6891,43 @@  rs6000_expand_vector_init (rtx target, r
   /* Double word values on VSX can use xxpermdi or lxvdsx.  */
   if (VECTOR_MEM_VSX_P (mode) && (mode == V2DFmode || mode == V2DImode))
     {
-      rtx op0 = XVECEXP (vals, 0, 0);
-      rtx op1 = XVECEXP (vals, 0, 1);
+      rtx op[2];
+      size_t i;
+      size_t num_elements = (all_same) ? 1 : 2;
+      for (i = 0; i < num_elements; i++)
+	{
+	  op[i] = XVECEXP (vals, 0, i);
+	  /* Just in case there is a SUBREG with a smaller mode, do a
+	     conversion.  */
+	  if (GET_MODE (op[i]) != inner_mode)
+	    {
+	      rtx tmp = gen_reg_rtx (inner_mode);
+	      convert_move (tmp, op[i], 0);
+	      op[i] = tmp;
+	    }
+	  /* Allow load with splat double word.  */
+	  else if (MEM_P (op[i]))
+	    {
+	      if (!all_same)
+		op[i] = force_reg (inner_mode, op[i]);
+	    }
+	  else if (!REG_P (op[i]))
+	    op[i] = force_reg (inner_mode, op[i]);
+	}
+
       if (all_same)
 	{
-	  if (!MEM_P (op0) && !REG_P (op0))
-	    op0 = force_reg (inner_mode, op0);
 	  if (mode == V2DFmode)
-	    emit_insn (gen_vsx_splat_v2df (target, op0));
+	    emit_insn (gen_vsx_splat_v2df (target, op[0]));
 	  else
-	    emit_insn (gen_vsx_splat_v2di (target, op0));
+	    emit_insn (gen_vsx_splat_v2di (target, op[0]));
 	}
       else
 	{
-	  op0 = force_reg (inner_mode, op0);
-	  op1 = force_reg (inner_mode, op1);
 	  if (mode == V2DFmode)
-	    emit_insn (gen_vsx_concat_v2df (target, op0, op1));
+	    emit_insn (gen_vsx_concat_v2df (target, op[0], op[1]));
 	  else
-	    emit_insn (gen_vsx_concat_v2di (target, op0, op1));
+	    emit_insn (gen_vsx_concat_v2di (target, op[0], op[1]));
 	}
       return;
     }
Index: gcc/testsuite/gcc.target/powerpc/pr72717.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr72717.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr72717.c	(revision 0)
@@ -0,0 +1,20 @@ 
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O2" } */
+
+typedef long V __attribute__((__vector_size__(32)));
+
+extern void foo (V *, V*);
+
+/* This test generated an failure in emit_move_insn.  */
+
+void
+foo(V *p, V *q)
+{
+  V v = *q;
+  *p = v << v[0];
+}
+
+/* { dg-final { scan-assembler-times "vsld" 2 } } */