From patchwork Tue Dec 6 07:57:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tnhuynh@apm.com X-Patchwork-Id: 703054 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tXvCH6679z9sD6 for ; Tue, 6 Dec 2016 18:58:50 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=apm.com header.i=@apm.com header.b="Mkl0sJyI"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751180AbcLFH6n (ORCPT ); Tue, 6 Dec 2016 02:58:43 -0500 Received: from mail-pg0-f53.google.com ([74.125.83.53]:33898 "EHLO mail-pg0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751427AbcLFH6l (ORCPT ); Tue, 6 Dec 2016 02:58:41 -0500 Received: by mail-pg0-f53.google.com with SMTP id x23so146693051pgx.1 for ; Mon, 05 Dec 2016 23:58:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=from:to:cc:subject:date:message-id; bh=VZY6aaeZWI1XInOpAy3wOviLgcdrY6KWTMKq5rv6VBU=; b=Mkl0sJyIn9zldAhlv/dci4me3yAzT82gEmga5eozLeqMh9LVh+JOEXxyf+bXPmI9ck +C0uPDmizKkXI3Tp5jqpXaoCzRgRUaf8v50Y32yqDgKq+Ves/WmXwdvS77PIrRP4KlkJ UXq3QFZ0nlboiMOS5fBPoZ2SF9Ja2cdZ4mkHU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=VZY6aaeZWI1XInOpAy3wOviLgcdrY6KWTMKq5rv6VBU=; b=PZMpH5xA038++zCjD4ZkFqWkvEYJW4m4j29J0HRnECYybbnnssV4WOV5j2B6tyI+yO XucQypWE0jtf+EEawT2VLIav6OkLiSstXjD2peZTqlq9gbKTQp2KLl92RVu0K1a+3DIP WiEE0HC8eHj+vDYATqWk7vFfHDq6WqZDwcjPt332Of8x136xuCvWHguJNsKDXdgaf5za kccQWhN7suEPQ/AeVCiAm5I+dEG36exd0zD9I7BWoSMMcVAr9gblHf1djgVl71GD8Lg0 VtwrPaHTewWGhgcxyg7HrNrng5DlDe9tDPBcAndS2+mk4KGIK6ig6+zVIY2ruVKOw2Ou gFxA== X-Gm-Message-State: AKaTC033Pk4y3GMp5czbJUcmNDWPsb4AdTORSuJREDZpZjlo/uuX4Rg3XsmMvdA0do8DKGlK X-Received: by 10.98.223.25 with SMTP id u25mr61124667pfg.96.1481011087437; Mon, 05 Dec 2016 23:58:07 -0800 (PST) Received: from localhost.localdomain ([118.69.219.197]) by smtp.gmail.com with ESMTPSA id e11sm32648595pgp.10.2016.12.05.23.58.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 05 Dec 2016 23:58:06 -0800 (PST) From: Tin Huynh To: Jarkko Nikula , Andy Shevchenko , Mika Westerberg , Wolfram Sang Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, Loc Ho , Thang Nguyen , Phong Vo , patches@apm.com, Tin Huynh Subject: [PATCH V2] i2c: designware: fix wrong tx/rx fifo for ACPI Date: Tue, 6 Dec 2016 14:57:53 +0700 Message-Id: <1481011073-29143-1-git-send-email-tnhuynh@apm.com> X-Mailer: git-send-email 1.7.1 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org ACPI always sets txfifo and rxfifo to 32. This configuration will cause problem if the IP core supports a fifo size of less than 32. The driver should read the fifo size from the IP and select the smaller one of the two. Signed-off-by: Tin Huynh --- drivers/i2c/busses/i2c-designware-platdrv.c | 15 +++++++++++---- 1 files changed, 11 insertions(+), 4 deletions(-) Change from V1: -Revert the default 32 for fifo, read parameter from IP core and pick the smaller one of the two. -Correct the title to describe new approach. diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 0b42a12..76b061f 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -153,6 +153,7 @@ static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare) static int dw_i2c_plat_probe(struct platform_device *pdev) { struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev); + u32 param1, tx_fifo_depth, rx_fifo_depth; struct dw_i2c_dev *dev; struct i2c_adapter *adap; struct resource *mem; @@ -246,12 +247,18 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) 1000000); } + param1 = i2c_dw_read_comp_param(dev); + tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; + rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; if (!dev->tx_fifo_depth) { - u32 param1 = i2c_dw_read_comp_param(dev); - - dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; - dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; + dev->tx_fifo_depth = tx_fifo_depth; + dev->rx_fifo_depth = rx_fifo_depth; dev->adapter.nr = pdev->id; + } else if (tx_fifo_depth) { + dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth, + tx_fifo_depth); + dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth, + rx_fifo_depth); } adap = &dev->adapter;