@@ -15000,6 +15000,9 @@ ix86_expand_move (enum machine_mode mode, rtx operands[])
rtx op0, op1;
enum tls_model model;
+ if (VALID_AVX256_REG_MODE (mode))
+ cfun->machine->use_avx256_p = true;
+
op0 = operands[0];
op1 = operands[1];
@@ -15144,7 +15147,7 @@ ix86_expand_vector_move (enum machine_mode mode, rtx operands[])
rtx op0 = operands[0], op1 = operands[1];
unsigned int align = GET_MODE_ALIGNMENT (mode);
- if (use_avx256_p (mode, NULL_TREE))
+ if (VALID_AVX256_REG_MODE (mode))
cfun->machine->use_avx256_p = true;
/* Force constants other than zero into memory. We do not know how
@@ -15253,6 +15256,9 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
{
rtx op0, op1, m;
+ if (VALID_AVX256_REG_MODE (mode))
+ cfun->machine->use_avx256_p = true;
+
op0 = operands[0];
op1 = operands[1];
new file mode 100644
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx -mtune=generic -dp" } */
+
+void feat_s3_cep_dcep (int cepsize_used, float **mfc, float **feat)
+{
+ float *f;
+ float *w, *_w;
+ int i;
+ __builtin_memcpy (feat[0], mfc[0], cepsize_used * sizeof(float));
+ f = feat[0] + cepsize_used;
+ w = mfc[2];
+ _w = mfc[-2];
+ for (i = 0; i < cepsize_used; i++)
+ f[i] = w[i] - _w[i];
+}
+
+/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */