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[U-Boot,v2,5/6] colibri_vf: use same NAND clock as Linux uses

Message ID 20161130214157.22331-6-stefan@agner.ch
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Commit Message

Stefan Agner Nov. 30, 2016, 9:41 p.m. UTC 
From: Stefan Agner <stefan.agner@toradex.com>

Currently a divider of 6 has been used, leading to following NAND
Flash Controller (NFC) clocks:
VF61: 27.7 MHz (166.7MHz bus clock)
VF50: 22 MHz (132MHz bus clock)

The NAND Flash Memory used on VF50 allows to use clock speed of
up to 33MHz, while the Flash Memory of VF61 allows 50MHz. We can
use the same divider of 4 on both modules to configure the maximal
possible clock speeds:
VF61: 41.7 MHz
VF50: 33 MHz

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
---

Changes in v2: None

 board/toradex/colibri_vf/colibri_vf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
index 15f263c..7b74eb7 100644
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -428,7 +428,7 @@  static void clock_init(void)
 			CCM_CSCDR2_ESDHC1_EN | CCM_CSCDR2_ESDHC1_CLK_DIV(0) |
 			CCM_CSCDR2_NFC_EN);
 	clrsetbits_le32(&ccm->cscdr3, CCM_REG_CTRL_MASK,
-			CCM_CSCDR3_NFC_PRE_DIV(5));
+			CCM_CSCDR3_NFC_PRE_DIV(3));
 	clrsetbits_le32(&ccm->cscmr2, CCM_REG_CTRL_MASK,
 			CCM_CSCMR2_RMII_CLK_SEL(2));
 }