| Message ID | 20161129191417.GA7362@ibm-tiger.the-meissners.org |
|---|---|
| State | New |
| Headers | show |
On Tue, Nov 29, 2016 at 02:14:17PM -0500, Michael Meissner wrote: > I was developing the next round of ISA 3.0 code changes to use the vector > extract byte, half word, and word instructions (VEXTU{B,H,W}{R,L}X) that > deposit the value into a general purpose register instead of a vector register, > and I was running the changes through the simulator. I discovered that my > previous change to allow QImode/HImode did not work if the value was in a > traditional Altivec register. > > This fixes the problem that I noticed. I didn't bother doing the full > bootstrap and check, since it only affects the power9 target. Can I check this > in? Certainly, please do. Thanks, Segher > 2016-11-29 Michael Meissner <meissner@linux.vnet.ibm.com> > > PR target/78594 > * config/rs6000/rs6000.md (mov<mode>_internal, QHI iterator): Add > 'x' to stxsi<wd>x print pattern, so that QImode and HImode values > residing in traditional altivec registers can be stored > correctly.
Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 242942) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -6863,7 +6863,7 @@ (define_insn "*mov<mode>_internal" l<wd>z%U1%X1 %0,%1 lxsi<wd>zx %x0,%y1 st<wd>%U0%X0 %1,%0 - stxsi<wd>x %1,%y0 + stxsi<wd>x %x1,%y0 li %0,%1 xxlor %x0,%x1,%x1 xxspltib %x0,0
I was developing the next round of ISA 3.0 code changes to use the vector extract byte, half word, and word instructions (VEXTU{B,H,W}{R,L}X) that deposit the value into a general purpose register instead of a vector register, and I was running the changes through the simulator. I discovered that my previous change to allow QImode/HImode did not work if the value was in a traditional Altivec register. This fixes the problem that I noticed. I didn't bother doing the full bootstrap and check, since it only affects the power9 target. Can I check this in? 2016-11-29 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/78594 * config/rs6000/rs6000.md (mov<mode>_internal, QHI iterator): Add 'x' to stxsi<wd>x print pattern, so that QImode and HImode values residing in traditional altivec registers can be stored correctly.