@@ -957,7 +957,6 @@ static void nvme_class_init(ObjectClass *oc, void *data)
pc->vendor_id = PCI_VENDOR_ID_INTEL;
pc->device_id = 0x5845;
pc->revision = 2;
- pc->is_express = 1;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->desc = "Non-Volatile Memory Express";
@@ -980,6 +979,10 @@ static const TypeInfo nvme_info = {
.instance_size = sizeof(NvmeCtrl),
.class_init = nvme_class_init,
.instance_init = nvme_instance_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void nvme_register_types(void)
@@ -666,7 +666,6 @@ static void e1000e_class_init(ObjectClass *class, void *data)
c->revision = 0;
c->romfile = "efi-e1000e.rom";
c->class_id = PCI_CLASS_NETWORK_ETHERNET;
- c->is_express = 1;
dc->desc = "Intel 82574L GbE Controller";
dc->reset = e1000e_qdev_reset;
@@ -701,6 +700,10 @@ static const TypeInfo e1000e_info = {
.instance_size = sizeof(E1000EState),
.class_init = e1000e_class_init,
.instance_init = e1000e_instance_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void e1000e_register_types(void)
@@ -2690,7 +2690,6 @@ static void vmxnet3_class_init(ObjectClass *class, void *data)
c->class_id = PCI_CLASS_NETWORK_ETHERNET;
c->subsystem_vendor_id = PCI_VENDOR_ID_VMWARE;
c->subsystem_id = PCI_DEVICE_ID_VMWARE_VMXNET3;
- c->is_express = 1;
dc->desc = "VMWare Paravirtualized Ethernet v3";
dc->reset = vmxnet3_qdev_reset;
dc->vmsd = &vmstate_vmxnet3;
@@ -2704,6 +2703,10 @@ static const TypeInfo vmxnet3_info = {
.instance_size = sizeof(VMXNET3State),
.class_init = vmxnet3_class_init,
.instance_init = vmxnet3_instance_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void vmxnet3_register_types(void)
@@ -190,7 +190,6 @@ static void ioh3420_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->is_express = 1;
k->is_bridge = 1;
k->config_write = ioh3420_write_config;
k->init = ioh3420_initfn;
@@ -209,6 +208,10 @@ static const TypeInfo ioh3420_info = {
.name = "ioh3420",
.parent = TYPE_PCIE_SLOT,
.class_init = ioh3420_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void ioh3420_register_types(void)
@@ -176,7 +176,6 @@ static void xio3130_downstream_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->is_express = 1;
k->is_bridge = 1;
k->config_write = xio3130_downstream_write_config;
k->init = xio3130_downstream_initfn;
@@ -195,6 +194,10 @@ static const TypeInfo xio3130_downstream_info = {
.name = "xio3130-downstream",
.parent = TYPE_PCIE_SLOT,
.class_init = xio3130_downstream_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void xio3130_downstream_register_types(void)
@@ -148,7 +148,6 @@ static void xio3130_upstream_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->is_express = 1;
k->is_bridge = 1;
k->config_write = xio3130_upstream_write_config;
k->init = xio3130_upstream_initfn;
@@ -166,6 +165,10 @@ static const TypeInfo xio3130_upstream_info = {
.name = "x3130-upstream",
.parent = TYPE_PCIE_PORT,
.class_init = xio3130_upstream_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void xio3130_upstream_register_types(void)
@@ -1962,7 +1962,7 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp)
bool is_default_rom;
/* initialize cap_present for pci_is_express() and pci_config_size() */
- if (pc->is_express) {
+ if (object_class_dynamic_cast(OBJECT_CLASS(pc), INTERFACE_PCIE_DEVICE)) {
pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
}
@@ -2509,7 +2509,6 @@ static void megasas_class_init(ObjectClass *oc, void *data)
pc->subsystem_vendor_id = PCI_VENDOR_ID_LSI_LOGIC;
pc->subsystem_id = info->subsystem_id;
pc->class_id = PCI_CLASS_STORAGE_RAID;
- pc->is_express = info->is_express;
e->mmio_bar = info->mmio_bar;
e->ioport_bar = info->ioport_bar;
e->osts = info->osts;
@@ -2538,11 +2537,18 @@ static void megasas_register_types(void)
for (i = 0; i < ARRAY_SIZE(megasas_devices); i++) {
const MegasasInfo *info = &megasas_devices[i];
TypeInfo type_info = {};
+ InterfaceInfo pcie_interfaces[] = {
+ { INTERFACE_PCIE_DEVICE },
+ { },
+ };
type_info.name = info->name;
type_info.parent = TYPE_MEGASAS_BASE;
type_info.class_data = (void *)info;
type_info.class_init = megasas_class_init;
+ if (info->is_express) {
+ type_info.interfaces = pcie_interfaces;
+ }
type_register(&type_info);
}
@@ -1274,7 +1274,6 @@ static void pvscsi_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_STORAGE_SCSI;
k->subsystem_id = 0x1000;
k->realize = pvscsi_pci_realize;
- k->is_express = 1;
dc->reset = pvscsi_reset;
dc->vmsd = &vmstate_pvscsi;
dc->props = pvscsi_properties;
@@ -1290,6 +1289,7 @@ static const TypeInfo pvscsi_info = {
.class_init = pvscsi_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_HOTPLUG_HANDLER },
+ { INTERFACE_PCIE_DEVICE },
{ }
}
};
@@ -3954,7 +3954,6 @@ static void xhci_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_NEC_UPD720200;
k->class_id = PCI_CLASS_SERIAL_USB;
k->revision = 0x03;
- k->is_express = 1;
}
static const TypeInfo xhci_info = {
@@ -3962,6 +3961,10 @@ static const TypeInfo xhci_info = {
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(XHCIState),
.class_init = xhci_class_init,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void xhci_register_types(void)
@@ -2973,7 +2973,6 @@ static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
pdc->exit = vfio_exitfn;
pdc->config_read = vfio_pci_read_config;
pdc->config_write = vfio_pci_write_config;
- pdc->is_express = 1; /* We might be */
}
static const TypeInfo vfio_pci_dev_info = {
@@ -2983,6 +2982,10 @@ static const TypeInfo vfio_pci_dev_info = {
.class_init = vfio_pci_dev_class_init,
.instance_init = vfio_instance_init,
.instance_finalize = vfio_instance_finalize,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
static void register_vfio_pci_dev_type(void)
@@ -1871,7 +1871,6 @@ static void virtio_pci_class_init(ObjectClass *klass, void *data)
k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
k->revision = VIRTIO_PCI_ABI_VERSION;
k->class_id = PCI_CLASS_OTHERS;
- k->is_express = 1;
dc->reset = virtio_pci_reset;
}
@@ -1882,6 +1881,10 @@ static const TypeInfo virtio_pci_info = {
.class_init = virtio_pci_class_init,
.class_size = sizeof(VirtioPCIClass),
.abstract = true,
+ .interfaces = (InterfaceInfo[]) {
+ { INTERFACE_PCIE_DEVICE },
+ { }
+ },
};
/* virtio-blk-pci */
@@ -229,9 +229,6 @@ typedef struct PCIDeviceClass {
*/
int is_bridge;
- /* pcie stuff */
- int is_express; /* is this device pci express? */
-
/* rom bar */
const char *romfile;
} PCIDeviceClass;
This patch changes all devices that set is_express=1 to implement INTERFACE_PCIE_DEVICE, and remove the is_express field completely. Cc: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> --- Changes series v1 -> v2: * Replacing v1 patch: "pci: Introduce INTERFACE_PCIE_DEVICE interface name" * Remove PCIDeviceClass::is_express field completely --- hw/block/nvme.c | 5 ++++- hw/net/e1000e.c | 5 ++++- hw/net/vmxnet3.c | 5 ++++- hw/pci-bridge/ioh3420.c | 5 ++++- hw/pci-bridge/xio3130_downstream.c | 5 ++++- hw/pci-bridge/xio3130_upstream.c | 5 ++++- hw/pci/pci.c | 2 +- hw/scsi/megasas.c | 8 +++++++- hw/scsi/vmw_pvscsi.c | 2 +- hw/usb/hcd-xhci.c | 5 ++++- hw/vfio/pci.c | 5 ++++- hw/virtio/virtio-pci.c | 5 ++++- include/hw/pci/pci.h | 3 --- 13 files changed, 45 insertions(+), 15 deletions(-)