From patchwork Mon Nov 1 21:28:18 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Koning X-Patchwork-Id: 69844 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 2CB6AB70A5 for ; Tue, 2 Nov 2010 08:28:31 +1100 (EST) Received: (qmail 25174 invoked by alias); 1 Nov 2010 21:28:29 -0000 Received: (qmail 25163 invoked by uid 22791); 1 Nov 2010 21:28:27 -0000 X-SWARE-Spam-Status: No, hits=0.9 required=5.0 tests=AWL, BAYES_00, MEDICAL_SUBJECT, TW_OV, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from ausc60ps301.us.dell.com (HELO ausc60ps301.us.dell.com) (143.166.148.206) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 01 Nov 2010 21:28:22 +0000 X-Loopcount0: from 10.152.240.141 From: Paul Koning Subject: [PATCH] pdp11: use iterators in md file Date: Mon, 1 Nov 2010 17:28:18 -0400 Message-Id: To: gcc-patches Mime-Version: 1.0 (Apple Message framework v1081) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This patch cleans up the pdp11.md file by using iterators and eliminating some unnecessary patterns. Tested by build and make check. Committed. paul ChangeLog: 2010-11-01 Paul Koning * config/pdp11/pdp11.md: Use iterators. (addqi3, subqi3, iorsi3, xorsi3): Delete. Index: config/pdp11/pdp11.md =================================================================== --- config/pdp11/pdp11.md (revision 166133) +++ config/pdp11/pdp11.md (working copy) @@ -122,35 +122,20 @@ }" [(set_attr "length" "4,4,6,6,12")]) -(define_insn "*cmphi" +(define_insn "*cmp" [(set (cc0) - (compare (match_operand:HI 0 "general_operand" "rR,rR,rR,Q,Qi,Qi") - (match_operand:HI 1 "general_operand" "N,rR,Qi,N,rR,Qi")))] + (compare (match_operand:PDPint 0 "general_operand" "rR,rR,rR,Q,Qi,Qi") + (match_operand:PDPint 1 "general_operand" "N,rR,Qi,N,rR,Qi")))] "" "@ - tst %0 - cmp %0,%1 - cmp %0,%1 - tst %0 - cmp %0,%1 - cmp %0,%1" + tst %0 + cmp %0,%1 + cmp %0,%1 + tst %0 + cmp %0,%1 + cmp %0,%1" [(set_attr "length" "2,2,4,4,4,6")]) -(define_insn "*cmpqi" - [(set (cc0) - (compare (match_operand:QI 0 "general_operand" "rR,rR,rR,Q,Qi,Qi") - (match_operand:QI 1 "general_operand" "N,rR,Qi,N,rR,Qi")))] - "" - "@ - tstb %0 - cmpb %0,%1 - cmpb %0,%1 - tstb %0 - cmpb %0,%1 - cmpb %0,%1" - [(set_attr "length" "2,2,4,4,4,6")]) - - ;; sob instruction - we need an assembler which can make this instruction ;; valid under _all_ circumstances! @@ -211,10 +196,10 @@ "TARGET_FPU" "") -(define_expand "cbranchhi4" +(define_expand "cbranch4" [(set (cc0) - (compare (match_operand:HI 1 "general_operand") - (match_operand:HI 2 "general_operand"))) + (compare (match_operand:PDPint 1 "general_operand") + (match_operand:PDPint 2 "general_operand"))) (set (pc) (if_then_else (match_operator 0 "ordered_comparison_operator" [(cc0) (const_int 0)]) @@ -223,18 +208,6 @@ "" "") -(define_expand "cbranchqi4" - [(set (cc0) - (compare (match_operand:QI 1 "general_operand") - (match_operand:QI 2 "general_operand"))) - (set (pc) - (if_then_else (match_operator 0 "ordered_comparison_operator" - [(cc0) (const_int 0)]) - (label_ref (match_operand 3 "" "")) - (pc)))] - "" - "") - ;; problem with too short jump distance! we need an assembler which can ;; make this valid for all jump distances! ;; e.g. gas! @@ -298,32 +271,19 @@ ;; we could split it up and make several sub-cases... [(set_attr "length" "4,6,8,16,16")]) -(define_insn "movhi" - [(set (match_operand:HI 0 "nonimmediate_operand" "=rR,rR,Q,Q") - (match_operand:HI 1 "general_operand" "rRN,Qi,rRN,Qi"))] +(define_insn "mov" + [(set (match_operand:PDPint 0 "nonimmediate_operand" "=rR,rR,Q,Q") + (match_operand:PDPint 1 "general_operand" "rRN,Qi,rRN,Qi"))] "" "* { if (operands[1] == const0_rtx) - return \"clr %0\"; + return \"clr %0\"; - return \"mov %1, %0\"; + return \"mov %1, %0\"; }" [(set_attr "length" "2,4,4,6")]) -(define_insn "movqi" - [(set (match_operand:QI 0 "nonimmediate_operand" "=rR,rR,Q,Q") - (match_operand:QI 1 "general_operand" "rRN,Qi,rRN,Qi"))] - "" - "* -{ - if (operands[1] == const0_rtx) - return \"clrb %0\"; - - return \"movb %1, %0\"; -}" - [(set_attr "length" "2,4,4,6")]) - (define_insn "movdf" [(set (match_operand:DF 0 "float_nonimm_operand" "=a,fR,a,Q,g") (match_operand:DF 1 "float_operand" "fFR,a,Q,a,g"))] @@ -718,25 +678,6 @@ }" [(set_attr "length" "2,4,4,6")]) -(define_insn "addqi3" - [(set (match_operand:QI 0 "nonimmediate_operand" "=rR,rR,Q,Q") - (plus:QI (match_operand:QI 1 "general_operand" "%0,0,0,0") - (match_operand:QI 2 "general_operand" "rRLM,Qi,rRLM,Qi")))] - "" - "* -{ - if (GET_CODE (operands[2]) == CONST_INT) - { - if (INTVAL(operands[2]) == 1) - return \"incb %0\"; - else if (INTVAL(operands[2]) == -1) - return \"decb %0\"; - } - - return \"add %2, %0\"; -}" - [(set_attr "length" "2,4,4,6")]) - ;;- subtract instructions ;; we don't have to care for constant second @@ -798,19 +739,6 @@ }" [(set_attr "length" "2,4,4,6")]) -(define_insn "subqi3" - [(set (match_operand:QI 0 "nonimmediate_operand" "=rR,rR,Q,Q") - (minus:QI (match_operand:QI 1 "general_operand" "0,0,0,0") - (match_operand:QI 2 "general_operand" "rR,Qi,rR,Qi")))] - "" - "* -{ - gcc_assert (GET_CODE (operands[2]) != CONST_INT); - - return \"sub %2, %0\"; -}" - [(set_attr "length" "2,4,4,6")]) - ;;;;- and instructions ;; Bit-and on the pdp (like on the VAX) is done with a clear-bits insn. @@ -850,95 +778,15 @@ [(set_attr "length" "2,4,4,6")]) ;;- Bit set (inclusive or) instructions -(define_insn "iorsi3" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,o,o,r,r,r,o,o,o") - (ior:SI (match_operand:SI 1 "general_operand" "%0,0,0,0,0,0,0,0,0,0") - (match_operand:SI 2 "general_operand" "r,o,r,o,I,J,K,I,J,K")))] +(define_insn "ior3" + [(set (match_operand:PDPint 0 "nonimmediate_operand" "=rR,rR,Q,Q") + (ior:PDPint (match_operand:PDPint 1 "general_operand" "%0,0,0,0") + (match_operand:PDPint 2 "general_operand" "rR,Qi,rR,Qi")))] "" - "* -{ /* Here we trust that operands don't overlap - - or is lateoperands the low word?? - looks like it! */ - - rtx lateoperands[3]; - - lateoperands[0] = operands[0]; - - if (REG_P (operands[0])) - operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); - else - operands[0] = adjust_address (operands[0], HImode, 2); - - if (! CONSTANT_P(operands[2])) - { - lateoperands[2] = operands[2]; - - if (REG_P (operands[2])) - operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); - else - operands[2] = adjust_address (operands[2], HImode, 2); - - output_asm_insn (\"bis %2, %0\", operands); - output_asm_insn (\"bis %2, %0\", lateoperands); - return \"\"; - } - - lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); - operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); - - /* these have different lengths, so we should have - different constraints! */ - if (INTVAL(operands[2])) - output_asm_insn (\"bis %2, %0\", operands); - - if (INTVAL(lateoperands[2])) - output_asm_insn (\"bis %2, %0\", lateoperands); - - return \"\"; -}" - [(set_attr "length" "4,8,8,12,4,4,8,6,6,12")]) - -(define_insn "iorhi3" - [(set (match_operand:HI 0 "nonimmediate_operand" "=rR,rR,Q,Q") - (ior:HI (match_operand:HI 1 "general_operand" "%0,0,0,0") - (match_operand:HI 2 "general_operand" "rR,Qi,rR,Qi")))] - "" - "bis %2, %0" + "bis %2, %0" [(set_attr "length" "2,4,4,6")]) -(define_insn "iorqi3" - [(set (match_operand:QI 0 "nonimmediate_operand" "=rR,rR,Q,Q") - (ior:QI (match_operand:QI 1 "general_operand" "%0,0,0,0") - (match_operand:QI 2 "general_operand" "rR,Qi,rR,Qi")))] - "" - "bisb %2, %0") - ;;- xor instructions -(define_insn "xorsi3" - [(set (match_operand:SI 0 "register_operand" "=r") - (xor:SI (match_operand:SI 1 "register_operand" "%0") - (match_operand:SI 2 "register_operand" "r")))] - "TARGET_40_PLUS" - "* -{ /* Here we trust that operands don't overlap */ - - rtx lateoperands[3]; - - lateoperands[0] = operands[0]; - operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); - - if (REG_P(operands[2])) - { - lateoperands[2] = operands[2]; - operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); - - output_asm_insn (\"xor %2, %0\", operands); - output_asm_insn (\"xor %2, %0\", lateoperands); - } - return \"\"; -}" - [(set_attr "length" "4")]) - (define_insn "xorhi3" [(set (match_operand:HI 0 "nonimmediate_operand" "=rR,Q") (xor:HI (match_operand:HI 1 "general_operand" "%0,0") @@ -949,22 +797,13 @@ ;;- one complement instructions -(define_insn "one_cmplhi2" - [(set (match_operand:HI 0 "nonimmediate_operand" "=rR,Q") - (not:HI (match_operand:HI 1 "general_operand" "0,0")))] +(define_insn "one_cmpl2" + [(set (match_operand:PDPint 0 "nonimmediate_operand" "=rR,Q") + (not:PDPint (match_operand:PDPint 1 "general_operand" "0,0")))] "" - "com %0" + "com %0" [(set_attr "length" "2,4")]) -(define_insn "one_cmplqi2" - [(set (match_operand:QI 0 "nonimmediate_operand" "=rR,rR") - (not:QI (match_operand:QI 1 "general_operand" "0,g")))] - "" - "@ - comb %0 - movb %1, %0\; comb %0" - [(set_attr "length" "2,4")]) - ;;- arithmetic shift instructions (define_insn "ashlsi3" [(set (match_operand:SI 0 "register_operand" "=r,r")