diff mbox

[U-Boot,v2,44/63] x86: ivybridge: Provide a dummy SDRAM init for 64-bit

Message ID 1479587152-25065-45-git-send-email-sjg@chromium.org
State Superseded
Delegated to: Bin Meng
Headers show

Commit Message

Simon Glass Nov. 19, 2016, 8:25 p.m. UTC 
We don't support SDRAM init in 64-bit mode since it is essentially
impossible to get into that mode before SDRAM set up. Provide dummy functions
for now. At some point we will need to pass the SDRAM parameters through from
SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 arch/x86/cpu/ivybridge/Makefile    |  3 +++
 arch/x86/cpu/ivybridge/sdram_nop.c | 29 +++++++++++++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 arch/x86/cpu/ivybridge/sdram_nop.c

Comments

Bin Meng Jan. 14, 2017, 1:32 p.m. UTC | #1 
Hi Simon,

On Sun, Nov 20, 2016 at 4:25 AM, Simon Glass <sjg@chromium.org> wrote:
> We don't support SDRAM init in 64-bit mode since it is essentially
> impossible to get into that mode before SDRAM set up. Provide dummy functions
> for now. At some point we will need to pass the SDRAM parameters through from
> SPL.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2: None
>
>  arch/x86/cpu/ivybridge/Makefile    |  3 +++
>  arch/x86/cpu/ivybridge/sdram_nop.c | 29 +++++++++++++++++++++++++++++
>  2 files changed, 32 insertions(+)
>  create mode 100644 arch/x86/cpu/ivybridge/sdram_nop.c
>
> diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile
> index 1a526c8f..25fbd59 100644
> --- a/arch/x86/cpu/ivybridge/Makefile
> +++ b/arch/x86/cpu/ivybridge/Makefile
> @@ -16,5 +16,8 @@ ifndef CONFIG_SPL_BUILD
>  obj-y += sata.o
>  endif
>  obj-$(CONFIG_$(SPL_)X86_32BIT_INIT) += sdram.o
> +ifndef CONFIG_$(SPL_)X86_32BIT_INIT
> +obj-y += sdram_nop.o
> +endif
>  endif
>  obj-y += bd82x6x.o
> diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c
> new file mode 100644
> index 0000000..edb3cb1
> --- /dev/null
> +++ b/arch/x86/cpu/ivybridge/sdram_nop.c
> @@ -0,0 +1,29 @@
> +/*
> + * Copyright (c) 2016 Google, Inc
> + *

nits: remove this blank line

> + *
> + * SPDX-License-Identifier:    GPL-2.0
> + */
> +
> +#include <common.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int dram_init(void)
> +{
> +       gd->ram_size = 1ULL << 31;
> +       gd->bd->bi_dram[0].start = 0;
> +       gd->bd->bi_dram[0].size = gd->ram_size;
> +
> +       return 0;
> +}
> +
> +int misc_init_r(void)
> +{
> +       return 0;
> +}
> +
> +int print_cpuinfo(void)
> +{
> +       return 0;
> +}

Should the above two functions be put into arch/x86/cpu/x86_64/cpu.c?
They are not SDRAM related.

Regards,
Bin
diff mbox

Patch

diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile
index 1a526c8f..25fbd59 100644
--- a/arch/x86/cpu/ivybridge/Makefile
+++ b/arch/x86/cpu/ivybridge/Makefile
@@ -16,5 +16,8 @@  ifndef CONFIG_SPL_BUILD
 obj-y += sata.o
 endif
 obj-$(CONFIG_$(SPL_)X86_32BIT_INIT) += sdram.o
+ifndef CONFIG_$(SPL_)X86_32BIT_INIT
+obj-y += sdram_nop.o
+endif
 endif
 obj-y += bd82x6x.o
diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c
new file mode 100644
index 0000000..edb3cb1
--- /dev/null
+++ b/arch/x86/cpu/ivybridge/sdram_nop.c
@@ -0,0 +1,29 @@ 
+/*
+ * Copyright (c) 2016 Google, Inc
+ *
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	gd->ram_size = 1ULL << 31;
+	gd->bd->bi_dram[0].start = 0;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+
+	return 0;
+}
+
+int misc_init_r(void)
+{
+	return 0;
+}
+
+int print_cpuinfo(void)
+{
+	return 0;
+}