From patchwork Mon Nov 14 03:44:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 694352 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tHGcH5PsGz9sCg for ; Mon, 14 Nov 2016 14:44:47 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="fLhYdMts"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:in-reply-to:message-id:references :mime-version:content-type; q=dns; s=default; b=ew/bZjaNvHv2VNBG /rpmfaeDmakjCSLN7GUgT4ieVDRqKDlt9hupecWu1IMmQj126WvutjnKFKRrwpHI uyFR5vUQ4QACmLI0vJ+IkQp5B8S/Zb8fFTCWcMhjwwmrIVqxAHQrBeXfDpTWPke0 bOw7I0saXACkQ3w5x/xV4diaIpQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:in-reply-to:message-id:references :mime-version:content-type; s=default; bh=omfbfh7UPlujr/c0Whz9U3 /KWts=; b=fLhYdMtsUoJNTpVqbKLJsh+DlQgYLsRvOXmVAFLT86MtSGttnr4nDC FXS+62Skxq8Jsk2cGaT8IKy+dNfS64PSbs6eUhc6/54FIqhSzKPPgOypOOZz0NJd c2iR9dAhvadAVvvB8QmlL6wdzM1pQqOrZtaugPO5I3/LwV+2nfX9g= Received: (qmail 72651 invoked by alias); 14 Nov 2016 03:44:38 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 72577 invoked by uid 89); 14 Nov 2016 03:44:37 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1710, expresses X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 14 Nov 2016 03:44:27 +0000 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id 072918BAF544; Mon, 14 Nov 2016 03:44:23 +0000 (GMT) Received: from [10.20.78.88] (10.20.78.88) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server id 14.3.294.0; Mon, 14 Nov 2016 03:44:22 +0000 Date: Mon, 14 Nov 2016 03:44:14 +0000 From: "Maciej W. Rozycki" To: CC: Catherine Moore , Matthew Fortune Subject: [PATCH 2/4] MIPS16/GCC: Correct `casesi_internal_mips16_'s RTL pattern In-Reply-To: Message-ID: References: User-Agent: Alpine 2.20.17 (DEB 179 2016-10-28) MIME-Version: 1.0 The machine operation performed in `casesi_internal_mips16_'s assembly is SLTU, which just like the `ltu' RTL operation expresses the less-than operation rather than less-than-or-equal usually performed by `casesi' patterns. This is because there is no suitable single MIPS16 hardware instruction for the less-than-or-equal operation. This however is already taken into account by the caller, `casesi', by incrementing operand 1 before calling `casesi_internal_mips16_', so the overall calculation is equivalent. So the generated assembly and consequently hardware operations are right and it is only the `casesi_internal_mips16_' insn whose RTL pattern does not match code produced. Also this insn is only ever emitted with an explicit call to `emit_jump_insn' from `casesi' and it is a solid assembly code block, so the mismatch does not affect code produced. Correct the RTL pattern then and use `ltu' rather than `leu' here. gcc/ * config/mips/mips.md (casesi_internal_mips16_): Use the `ltu' rather than `leu' operation in the RTL pattern --- OK to apply? Maciej gcc-mips16-casesi-ltu.diff Index: gcc/gcc/config/mips/mips.md =================================================================== --- gcc.orig/gcc/config/mips/mips.md 2016-11-09 18:57:01.883156298 +0000 +++ gcc/gcc/config/mips/mips.md 2016-11-09 20:15:10.392159385 +0000 @@ -6401,7 +6401,7 @@ (define_insn "casesi_internal_mips16_" [(set (pc) (if_then_else - (leu (match_operand:SI 0 "register_operand" "d") + (ltu (match_operand:SI 0 "register_operand" "d") (match_operand:SI 1 "arith_operand" "dI")) (unspec:P [(match_dup 0)