| Message ID | 20161107130218.GK3541@tucnak.redhat.com |
|---|---|
| State | New |
| Headers | show |
On Mon, Nov 7, 2016 at 2:02 PM, Jakub Jelinek <jakub@redhat.com> wrote: > Hi! > > The following testcases ICE at -O0, because ix86_expand_sse_cmp avoid using > the passed in dest only if optimize or if there is some value overlap, but > we actually need to do that also if we have a maskcmp where we want to use > a different mode than dest has. > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-11-07 Jakub Jelinek <jakub@redhat.com> > > PR target/78227 > * config/i386/i386.c (ix86_expand_sse_cmp): Force dest into > cmp_mode argument even for -O0 if cmp_mode != mode and maskcmp. > > * gcc.target/i386/pr78227-1.c: New test. > * gcc.target/i386/pr78227-2.c: New test. OK with a small nit, please see inline ... Thanks, Uros. > --- gcc/config/i386/i386.c.jj 2016-11-04 20:09:48.000000000 +0100 > +++ gcc/config/i386/i386.c 2016-11-07 10:14:15.625018144 +0100 > @@ -23561,6 +23561,7 @@ ix86_expand_sse_cmp (rtx dest, enum rtx_ > cmp_op1 = force_reg (cmp_ops_mode, cmp_op1); > > if (optimize > + || (cmp_mode != mode && maskcmp) Maybe beter to switch condition around, so: "(maskcmp && cmp_mode != mode)" > || (op_true && reg_overlap_mentioned_p (dest, op_true)) > || (op_false && reg_overlap_mentioned_p (dest, op_false))) > dest = gen_reg_rtx (maskcmp ? cmp_mode : mode); > --- gcc/testsuite/gcc.target/i386/pr78227-1.c.jj 2016-11-07 10:15:52.606762613 +0100 > +++ gcc/testsuite/gcc.target/i386/pr78227-1.c 2016-11-07 10:24:58.821480125 +0100 > @@ -0,0 +1,30 @@ > +/* PR target/78227 */ > +/* { dg-do compile } */ > +/* { dg-options "-mavx512f -O0 -Wno-psabi" } */ > + > +typedef int V __attribute__((vector_size (64))); > +typedef long long int W __attribute__((vector_size (64))); > + > +V > +foo1 (V v) > +{ > + return v > 0; > +} > + > +V > +bar1 (V v) > +{ > + return v != 0; > +} > + > +W > +foo2 (W w) > +{ > + return w > 0; > +} > + > +W > +bar2 (W w) > +{ > + return w != 0; > +} > --- gcc/testsuite/gcc.target/i386/pr78227-2.c.jj 2016-11-07 10:22:17.055670476 +0100 > +++ gcc/testsuite/gcc.target/i386/pr78227-2.c 2016-11-07 10:25:03.722413765 +0100 > @@ -0,0 +1,30 @@ > +/* PR target/78227 */ > +/* { dg-do compile } */ > +/* { dg-options "-mavx512bw -O0 -Wno-psabi" } */ > + > +typedef signed char V __attribute__((vector_size (64))); > +typedef short int W __attribute__((vector_size (64))); > + > +V > +foo1 (V v) > +{ > + return v > 0; > +} > + > +V > +bar1 (V v) > +{ > + return v != 0; > +} > + > +W > +foo2 (W w) > +{ > + return w > 0; > +} > + > +W > +bar2 (W w) > +{ > + return w != 0; > +} > > Jakub
--- gcc/config/i386/i386.c.jj 2016-11-04 20:09:48.000000000 +0100 +++ gcc/config/i386/i386.c 2016-11-07 10:14:15.625018144 +0100 @@ -23561,6 +23561,7 @@ ix86_expand_sse_cmp (rtx dest, enum rtx_ cmp_op1 = force_reg (cmp_ops_mode, cmp_op1); if (optimize + || (cmp_mode != mode && maskcmp) || (op_true && reg_overlap_mentioned_p (dest, op_true)) || (op_false && reg_overlap_mentioned_p (dest, op_false))) dest = gen_reg_rtx (maskcmp ? cmp_mode : mode); --- gcc/testsuite/gcc.target/i386/pr78227-1.c.jj 2016-11-07 10:15:52.606762613 +0100 +++ gcc/testsuite/gcc.target/i386/pr78227-1.c 2016-11-07 10:24:58.821480125 +0100 @@ -0,0 +1,30 @@ +/* PR target/78227 */ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O0 -Wno-psabi" } */ + +typedef int V __attribute__((vector_size (64))); +typedef long long int W __attribute__((vector_size (64))); + +V +foo1 (V v) +{ + return v > 0; +} + +V +bar1 (V v) +{ + return v != 0; +} + +W +foo2 (W w) +{ + return w > 0; +} + +W +bar2 (W w) +{ + return w != 0; +} --- gcc/testsuite/gcc.target/i386/pr78227-2.c.jj 2016-11-07 10:22:17.055670476 +0100 +++ gcc/testsuite/gcc.target/i386/pr78227-2.c 2016-11-07 10:25:03.722413765 +0100 @@ -0,0 +1,30 @@ +/* PR target/78227 */ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -O0 -Wno-psabi" } */ + +typedef signed char V __attribute__((vector_size (64))); +typedef short int W __attribute__((vector_size (64))); + +V +foo1 (V v) +{ + return v > 0; +} + +V +bar1 (V v) +{ + return v != 0; +} + +W +foo2 (W w) +{ + return w > 0; +} + +W +bar2 (W w) +{ + return w != 0; +}