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[gcc/MIPS] Make loongson3a use fused madd.d

Message ID CAKjxQHnGTMutwgr0yTpViN+M_beNwBA-eEO5UV6mPkx6zi7MNQ@mail.gmail.com
State New
Headers show

Commit Message

Paul Hua Nov. 3, 2016, 2:27 a.m. UTC
Hi,

Loongson3a has 4 operand fused madd instrcution. This patch set
loongson3a use fused madd.d.



ChangeLog :

*** gcc/ChangeLog ***

2016-11-03 Chenghua Xu <paul.hua.gm@gmail.com>

    config/mips/
    * mips.h: Set loongson3a use fused madd.d.


Tested on loongson3a.


PS: I will soon submit some patches, how can i get a copyright assignment.

Comments

Matthew Fortune Nov. 3, 2016, 10:31 a.m. UTC | #1
Paul Hua <paul.hua.gm@gmail.com> writes:
> Loongson3a has 4 operand fused madd instrcution. This patch set

> loongson3a use fused madd.d.


Hi Paul,

Thanks for the fix. I was vaguely aware that this was wrong for
loongson-3a but never confirmed it.

I suspect this change is mechanical enough that it can bypass
copyright assignment but I'd need a global maintainer to comment.

I've sent you copyright assignment paperwork separately.

Two comments on the patch:

> ChangeLog :

> 

> *** gcc/ChangeLog ***

> 

> 2016-11-03 Chenghua Xu <paul.hua.gm@gmail.com>

> 

>     config/mips/

>     * mips.h: Set loongson3a use fused madd.d.


The changelog needs to reference what was changed rather than the
effect of the change:

	* config/mips/mips.h (ISA_HAS_FUSED_MADD4): Enable for
	TARGET_LOONGSON_3A.
	(ISA_HAS_UNFUSED_MADD4): Exclude TARGET_LOONGSON_3A.


>diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h

>index 81862a9..5076a2b 100644

>--- a/gcc/config/mips/mips.h

>+++ b/gcc/config/mips/mips.h

>@@ -1056,11 +1056,11 @@ struct mips_cpu_info {

> 

> /* ISA has 4 operand fused madd instructions of the form

>    'd = [+-] (a * b [+-] c)'.  */

>-#define ISA_HAS_FUSED_MADD4	TARGET_MIPS8000

>+#define ISA_HAS_FUSED_MADD4	(TARGET_MIPS8000 || TARGET_LOONGSON_3A)

> 

> /* ISA has 4 operand unfused madd instructions of the form

>    'd = [+-] (a * b [+-] c)'.  */

>-#define ISA_HAS_UNFUSED_MADD4	(ISA_HAS_FP4 && !TARGET_MIPS8000)

>+#define ISA_HAS_UNFUSED_MADD4	(ISA_HAS_FP4 && !TARGET_MIPS8000 && !TARGET_LOONGSON_3A)


Please split this line and move && !TARGET_LOONGSON_3A to the next line
under ISA_HAS_FP4.

> 

> /* ISA has 3 operand r6 fused madd instructions of the form

>    'c = c [+-] (a * b)'.  */


Thanks,
Matthew
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Patch

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 81862a9..5076a2b 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1056,11 +1056,11 @@  struct mips_cpu_info {
 
 /* ISA has 4 operand fused madd instructions of the form
    'd = [+-] (a * b [+-] c)'.  */
-#define ISA_HAS_FUSED_MADD4	TARGET_MIPS8000
+#define ISA_HAS_FUSED_MADD4	(TARGET_MIPS8000 || TARGET_LOONGSON_3A)
 
 /* ISA has 4 operand unfused madd instructions of the form
    'd = [+-] (a * b [+-] c)'.  */
-#define ISA_HAS_UNFUSED_MADD4	(ISA_HAS_FP4 && !TARGET_MIPS8000)
+#define ISA_HAS_UNFUSED_MADD4	(ISA_HAS_FP4 && !TARGET_MIPS8000 && !TARGET_LOONGSON_3A)
 
 /* ISA has 3 operand r6 fused madd instructions of the form
    'c = c [+-] (a * b)'.  */