Patchwork [i386] Don't expand vector abs+neg to xor immediately

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Submitter Richard Henderson
Date Oct. 23, 2010, 4:44 p.m.
Message ID <4CC310E2.2010303@redhat.com>
Download mbox | patch
Permalink /patch/69006/
State New
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Comments

Richard Henderson - Oct. 23, 2010, 4:44 p.m.
On 10/23/2010 08:50 AM, H.J. Lu wrote:
> On Fri, Oct 22, 2010 at 12:40 PM, Richard Henderson <rth@redhat.com> wrote:
>> This solves the problem that Richi saw on x86 with fma
>> plus negation on vectors not being merged into fnma etc
>> during combine.
>>
>> Tested on x86_64-linux.
>>
> 
> This caused:
> 
> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46144

Fixed thus.


r~


	PR target/46144
	* config/i386/sse.md (*avx_absneg<AVXMODEF2P>2): New.
	(*sse_absneg<SSEMODEF2P>2): Rename from *absneg<VEC_FLOAT_MODE>2.
	Honor matching operands when splitting to XOR.

Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index d80be88..ffddf18 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -585,21 +585,46 @@ 
   ""
   "ix86_expand_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
 
-(define_insn_and_split "*absneg<mode>2"
-  [(set (match_operand:VEC_FLOAT_MODE 0 "register_operand" "=x,x")
-	(match_operator:VEC_FLOAT_MODE 3 "absneg_operator"
-	  [(match_operand:VEC_FLOAT_MODE 1 "nonimmediate_operand" "0,xm")]))
-   (use (match_operand:VEC_FLOAT_MODE 2 "nonimmediate_operand" "xm,0"))]
-  "SSE_VEC_FLOAT_MODE_P (<MODE>mode) || AVX256_VEC_FLOAT_MODE_P (<MODE>mode)"
+(define_insn_and_split "*avx_absneg<mode>2"
+  [(set (match_operand:AVXMODEF2P 0 "register_operand" "=x,x")
+	(match_operator:AVXMODEF2P 3 "absneg_operator"
+	  [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "x,m")]))
+   (use (match_operand:AVXMODEF2P 2 "nonimmediate_operand" "xm,x"))]
+  "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
   "#"
   "&& reload_completed"
   [(const_int 0)]
 {
-  rtx set;
-  set = gen_rtx_fmt_ee (GET_CODE (operands[3]) == NEG ? XOR : AND,
+  rtx t;
+
+  if (MEM_P (operands[1]))
+    t = gen_rtx_fmt_ee (GET_CODE (operands[3]) == NEG ? XOR : AND,
+			<MODE>mode, operands[2], operands[1]);
+  else
+    t = gen_rtx_fmt_ee (GET_CODE (operands[3]) == NEG ? XOR : AND,
 			<MODE>mode, operands[1], operands[2]);
-  set = gen_rtx_SET (VOIDmode, operands[0], set);
-  emit_insn (set);
+  t = gen_rtx_SET (VOIDmode, operands[0], t);
+  emit_insn (t);
+  DONE;
+})
+
+(define_insn_and_split "*sse_absneg<mode>2"
+  [(set (match_operand:SSEMODEF2P 0 "register_operand" "=x,x")
+	(match_operator:SSEMODEF2P 3 "absneg_operator"
+	  [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "0,xm")]))
+   (use (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "xm,0"))]
+  "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
+  "#"
+  "&& reload_completed"
+  [(const_int 0)]
+{
+  rtx t;
+
+  t = operands[rtx_equal_p (operands[0], operands[1]) ? 2 : 1];
+  t = gen_rtx_fmt_ee (GET_CODE (operands[3]) == NEG ? XOR : AND,
+		      <MODE>mode, operands[0], t);
+  t = gen_rtx_SET (VOIDmode, operands[0], t);
+  emit_insn (t);
   DONE;
 })