Patchwork rtc: rs5c313: Replase from ctrl_* to __raw_*

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Submitter Nobuhiro Iwamatsu
Date Oct. 22, 2010, 10:01 p.m.
Message ID <1287784914-5714-1-git-send-email-iwamatsu@nigauri.org>
Download mbox | patch
Permalink /patch/68980/
State New
Headers show

Comments

Nobuhiro Iwamatsu - Oct. 22, 2010, 10:01 p.m.
ctrl_* is deprecated. We should to use __raw_*.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
 drivers/rtc/rtc-rs5c313.c |   36 ++++++++++++++++++------------------
 1 files changed, 18 insertions(+), 18 deletions(-)
Harvey Harrison - Oct. 22, 2010, 10:09 p.m.
On Fri, Oct 22, 2010 at 3:01 PM, Nobuhiro Iwamatsu <iwamatsu@nigauri.org> wrote:
> ctrl_* is deprecated. We should to use __raw_*.
>

>
>        /* And Initialize SCL for RS5C313 clock */
> -       scsptr1_data = ctrl_inb(SCSPTR1) | SCL; /* SCL:H */
> -       ctrl_outb(scsptr1_data, SCSPTR1);
> -       scsptr1_data = ctrl_inb(SCSPTR1) | SCL_OEN;     /* SCL output enable */
> -       ctrl_outb(scsptr1_data, SCSPTR1);
> +       scsptr1_data = __raw_readb(SCSPTR1) | SCL;      /* SCL:H */
> +       __raw_writeb(scsptr1_data, SCSPTR1);
> +       scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN;  /* SCL output enable */
> +       __raw_writeb(scsptr1_data, SCSPTR1);
>        RS5C313_CEDISABLE;      /* CE:L */
>  }

I think that you need a barrier between write and the subsequent read
as the __raw helpers do not
imply one.  Otherwise the write isn't guaranteed to be done before the read.

Harvey
Nobuhiro Iwamatsu - Oct. 26, 2010, 3:01 a.m.
On 10月23日, 午前7:09, Harvey Harrison <harvey.harri...@gmail.com> wrote:
> On Fri, Oct 22, 2010 at 3:01 PM, Nobuhiro Iwamatsu <iwama...@nigauri.org> wrote:
> > ctrl_* is deprecated. We should to use __raw_*.
>
> >        /* And Initialize SCL for RS5C313 clock */
> > -       scsptr1_data = ctrl_inb(SCSPTR1) | SCL; /* SCL:H */
> > -       ctrl_outb(scsptr1_data, SCSPTR1);
> > -       scsptr1_data = ctrl_inb(SCSPTR1) | SCL_OEN;     /* SCL output enable */
> > -       ctrl_outb(scsptr1_data, SCSPTR1);
> > +       scsptr1_data = __raw_readb(SCSPTR1) | SCL;      /* SCL:H */
> > +       __raw_writeb(scsptr1_data, SCSPTR1);
> > +       scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN;  /* SCL output enable */
> > +       __raw_writeb(scsptr1_data, SCSPTR1);
> >        RS5C313_CEDISABLE;      /* CE:L */
> >  }
>
> I think that you need a barrier between write and the subsequent read
> as the __raw helpers do not
> imply one.  Otherwise the write isn't guaranteed to be done before the read.
>
Oh, thanks.

I will send fixed patch.

Best regards,
  Nobuhiro

Patch

diff --git a/drivers/rtc/rtc-rs5c313.c b/drivers/rtc/rtc-rs5c313.c
index e6ea3f5..49ec910 100644
--- a/drivers/rtc/rtc-rs5c313.c
+++ b/drivers/rtc/rtc-rs5c313.c
@@ -1,6 +1,6 @@ 
 /*
  * Ricoh RS5C313 RTC device/driver
- *  Copyright (C) 2007 Nobuhiro Iwamatsu
+ *  Copyright (C) 2007, 2010 Nobuhiro Iwamatsu
  *
  *  2005-09-19 modifed by kogiidena
  *
@@ -80,21 +80,21 @@ 
 /* SCSPTR1 data */
 unsigned char scsptr1_data;
 
-#define RS5C313_CEENABLE    ctrl_outb(RS5C313_CE_RTCCE, RS5C313_CE);
-#define RS5C313_CEDISABLE   ctrl_outb(0x00, RS5C313_CE)
-#define RS5C313_MISCOP      ctrl_outb(0x02, 0xB0000008)
+#define RS5C313_CEENABLE    __raw_writeb(RS5C313_CE_RTCCE, RS5C313_CE);
+#define RS5C313_CEDISABLE   __raw_writeb(0x00, RS5C313_CE)
+#define RS5C313_MISCOP      __raw_writeb(0x02, 0xB0000008)
 
 static void rs5c313_init_port(void)
 {
 	/* Set SCK as I/O port and Initialize SCSPTR1 data & I/O port. */
-	ctrl_outb(ctrl_inb(SCSMR1) & ~SCSMR1_CA, SCSMR1);
-	ctrl_outb(ctrl_inb(SCSCR1) & ~SCSCR1_CKE, SCSCR1);
+	__raw_writeb(__raw_readb(SCSMR1) & ~SCSMR1_CA, SCSMR1);
+	__raw_writeb(__raw_readb(SCSCR1) & ~SCSCR1_CKE, SCSCR1);
 
 	/* And Initialize SCL for RS5C313 clock */
-	scsptr1_data = ctrl_inb(SCSPTR1) | SCL;	/* SCL:H */
-	ctrl_outb(scsptr1_data, SCSPTR1);
-	scsptr1_data = ctrl_inb(SCSPTR1) | SCL_OEN;	/* SCL output enable */
-	ctrl_outb(scsptr1_data, SCSPTR1);
+	scsptr1_data = __raw_readb(SCSPTR1) | SCL;	/* SCL:H */
+	__raw_writeb(scsptr1_data, SCSPTR1);
+	scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN;	/* SCL output enable */
+	__raw_writeb(scsptr1_data, SCSPTR1);
 	RS5C313_CEDISABLE;	/* CE:L */
 }
 
@@ -106,21 +106,21 @@  static void rs5c313_write_data(unsigned char data)
 		/* SDA:Write Data */
 		scsptr1_data = (scsptr1_data & ~SDA) |
 				((((0x80 >> i) & data) >> (7 - i)) << 2);
-		ctrl_outb(scsptr1_data, SCSPTR1);
+		__raw_writeb(scsptr1_data, SCSPTR1);
 		if (i == 0) {
 			scsptr1_data |= SDA_OEN;	/* SDA:output enable */
-			ctrl_outb(scsptr1_data, SCSPTR1);
+			__raw_writeb(scsptr1_data, SCSPTR1);
 		}
 		ndelay(700);
 		scsptr1_data &= ~SCL;	/* SCL:L */
-		ctrl_outb(scsptr1_data, SCSPTR1);
+		__raw_writeb(scsptr1_data, SCSPTR1);
 		ndelay(700);
 		scsptr1_data |= SCL;	/* SCL:H */
-		ctrl_outb(scsptr1_data, SCSPTR1);
+		__raw_writeb(scsptr1_data, SCSPTR1);
 	}
 
 	scsptr1_data &= ~SDA_OEN;	/* SDA:output disable */
-	ctrl_outb(scsptr1_data, SCSPTR1);
+	__raw_writeb(scsptr1_data, SCSPTR1);
 }
 
 static unsigned char rs5c313_read_data(void)
@@ -131,12 +131,12 @@  static unsigned char rs5c313_read_data(void)
 	for (i = 0; i < 8; i++) {
 		ndelay(700);
 		/* SDA:Read Data */
-		data |= ((ctrl_inb(SCSPTR1) & SDA) >> 2) << (7 - i);
+		data |= ((__raw_readb(SCSPTR1) & SDA) >> 2) << (7 - i);
 		scsptr1_data &= ~SCL;	/* SCL:L */
-		ctrl_outb(scsptr1_data, SCSPTR1);
+		__raw_writeb(scsptr1_data, SCSPTR1);
 		ndelay(700);
 		scsptr1_data |= SCL;	/* SCL:H */
-		ctrl_outb(scsptr1_data, SCSPTR1);
+		__raw_writeb(scsptr1_data, SCSPTR1);
 	}
 	return data & 0x0F;
 }