Patchwork [i386] Transform __builtin_fma during vectorization.

login
register
mail settings
Submitter Richard Henderson
Date Oct. 22, 2010, 7:41 p.m.
Message ID <4CC1E8FD.4080803@redhat.com>
Download mbox | patch
Permalink /patch/68943/
State New
Headers show

Comments

Richard Henderson - Oct. 22, 2010, 7:41 p.m.
We already have the vector builtins, we just needed
to hook them up.


r~

Patch

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5f04fc4..2c8bf86 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@ 
 2010-10-22  Richard Henderson  <rth@redhat.com>
 
+	* config/i386/i386.c (ix86_builtin_vectorized_function): Add
+	cases for __builtin_fma and __builtin_fmaf.
+
+2010-10-22  Richard Henderson  <rth@redhat.com>
+
 	* config/i386/i386.c (ix86_expand_fp_absneg_operator): Produce
 	NEG+USE for vectors as well.
 	* config/i386/i386.md (*absneg<VEC_FLOAT_MODE>2): New pattern
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ee88b06..bf16d08 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -26105,8 +26105,28 @@  ix86_builtin_vectorized_function (tree fndecl, tree type_out,
 	}
       break;
 
+    case BUILT_IN_FMA:
+      if (out_mode == DFmode && in_mode == DFmode)
+	{
+	  if (out_n == 2 && in_n == 2)
+	    return ix86_builtins[IX86_BUILTIN_VFMADDPD];
+	  if (out_n == 4 && in_n == 4)
+	    return ix86_builtins[IX86_BUILTIN_VFMADDPD256];
+	}
+      break;
+
+    case BUILT_IN_FMAF:
+      if (out_mode == SFmode && in_mode == SFmode)
+	{
+	  if (out_n == 4 && in_n == 4)
+	    return ix86_builtins[IX86_BUILTIN_VFMADDPS];
+	  if (out_n == 8 && in_n == 8)
+	    return ix86_builtins[IX86_BUILTIN_VFMADDPS256];
+	}
+      break;
+
     default:
-      ;
+      break;
     }
 
   /* Dispatch to a handler for a vectorization library.  */
diff --git a/gcc/testsuite/gcc.target/i386/fma3-builtin-2.c b/gcc/testsuite/gcc.target/i386/fma3-builtin-2.c
new file mode 100644
index 0000000..b84e4a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/fma3-builtin-2.c
@@ -0,0 +1,97 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -mfma -mno-fma4" } */
+
+#ifndef SIZE
+#define SIZE 1024
+#endif
+
+double vda[SIZE] __attribute__((__aligned__(32)));
+double vdb[SIZE] __attribute__((__aligned__(32)));
+double vdc[SIZE] __attribute__((__aligned__(32)));
+double vdd[SIZE] __attribute__((__aligned__(32)));
+
+float vfa[SIZE] __attribute__((__aligned__(32)));
+float vfb[SIZE] __attribute__((__aligned__(32)));
+float vfc[SIZE] __attribute__((__aligned__(32)));
+float vfd[SIZE] __attribute__((__aligned__(32)));
+
+void
+vector_fma (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vda[i] = __builtin_fma (vdb[i], vdc[i], vdd[i]);
+}
+
+void
+vector_fms (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vda[i] = __builtin_fma (vdb[i], vdc[i], -vdd[i]);
+}
+
+void
+vector_fnma (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vda[i] = __builtin_fma (-vdb[i], vdc[i], vdd[i]);
+}
+
+void
+vector_fnms (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vda[i] = __builtin_fma (-vdb[i], vdc[i], -vdd[i]);
+}
+
+void
+vector_fmaf (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vfa[i] = __builtin_fmaf (vfb[i], vfc[i], vfd[i]);
+}
+
+void
+vector_fmsf (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vfa[i] = __builtin_fmaf (vfb[i], vfc[i], -vfd[i]);
+}
+
+void
+vector_fnmaf (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vfa[i] = __builtin_fmaf (-vfb[i], vfc[i], vfd[i]);
+}
+
+void
+vector_fnmsf (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vfa[i] = __builtin_fmaf (-vfb[i], vfc[i], -vfd[i]);
+}
+
+/* { dg-final { scan-assembler-times "vfmadd...ps" 1 } } */
+/* { dg-final { scan-assembler-times "vfmadd...pd" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...ps" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsub...pd" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...ps" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmadd...pd" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...ps" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsub...pd" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/fma4-builtin-2.c b/gcc/testsuite/gcc.target/i386/fma4-builtin-2.c
new file mode 100644
index 0000000..a7e3975
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/fma4-builtin-2.c
@@ -0,0 +1,97 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -mfma4" } */
+
+#ifndef SIZE
+#define SIZE 1024
+#endif
+
+double vda[SIZE] __attribute__((__aligned__(32)));
+double vdb[SIZE] __attribute__((__aligned__(32)));
+double vdc[SIZE] __attribute__((__aligned__(32)));
+double vdd[SIZE] __attribute__((__aligned__(32)));
+
+float vfa[SIZE] __attribute__((__aligned__(32)));
+float vfb[SIZE] __attribute__((__aligned__(32)));
+float vfc[SIZE] __attribute__((__aligned__(32)));
+float vfd[SIZE] __attribute__((__aligned__(32)));
+
+void
+vector_fma (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vda[i] = __builtin_fma (vdb[i], vdc[i], vdd[i]);
+}
+
+void
+vector_fms (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vda[i] = __builtin_fma (vdb[i], vdc[i], -vdd[i]);
+}
+
+void
+vector_fnma (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vda[i] = __builtin_fma (-vdb[i], vdc[i], vdd[i]);
+}
+
+void
+vector_fnms (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vda[i] = __builtin_fma (-vdb[i], vdc[i], -vdd[i]);
+}
+
+void
+vector_fmaf (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vfa[i] = __builtin_fmaf (vfb[i], vfc[i], vfd[i]);
+}
+
+void
+vector_fmsf (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vfa[i] = __builtin_fmaf (vfb[i], vfc[i], -vfd[i]);
+}
+
+void
+vector_fnmaf (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vfa[i] = __builtin_fmaf (-vfb[i], vfc[i], vfd[i]);
+}
+
+void
+vector_fnmsf (void)
+{
+  int i;
+
+  for (i = 0; i < SIZE; i++)
+    vfa[i] = __builtin_fmaf (-vfb[i], vfc[i], -vfd[i]);
+}
+
+/* { dg-final { scan-assembler-times "vfmaddps" 1 } } */
+/* { dg-final { scan-assembler-times "vfmaddpd" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubps" 1 } } */
+/* { dg-final { scan-assembler-times "vfmsubpd" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmaddps" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmaddpd" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsubps" 1 } } */
+/* { dg-final { scan-assembler-times "vfnmsubpd" 1 } } */