@@ -388,7 +388,7 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
int ret = 0;
u32 pin_reg;
unsigned long flags;
- u32 level_trig;
+ bool level_trig;
u32 active_level;
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct amd_gpio *gpio_dev = to_amd_gpio(gc);
@@ -401,13 +401,12 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
* default settings, ignore incoming settings from client and use
* BIOS settings to configure GPIO register.
*/
- level_trig = pin_reg & (LEVEL_TRIGGER << LEVEL_TRIG_OFF);
+ level_trig = !(pin_reg & (LEVEL_TRIGGER << LEVEL_TRIG_OFF));
active_level = pin_reg & (ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
- if((!level_trig) &&
- ((active_level >> ACTIVE_LEVEL_OFF) == ACTIVE_HIGH)) {
+ if(level_trig &&
+ ((active_level >> ACTIVE_LEVEL_OFF) == ACTIVE_HIGH))
type = IRQ_TYPE_EDGE_FALLING;
- }
switch (type & IRQ_TYPE_SENSE_MASK) {
case IRQ_TYPE_EDGE_RISING: