| Message ID | 1477499766-11722-5-git-send-email-laurent@vivier.eu |
|---|---|
| State | New |
| Headers | show |
On 10/26/2016 09:35 AM, Laurent Vivier wrote: > Signed-off-by: Laurent Vivier <laurent@vivier.eu> > --- > target-m68k/translate.c | 65 ++++++++++++++++++++++++++++++++++--------------- > 1 file changed, 45 insertions(+), 20 deletions(-) > > diff --git a/target-m68k/translate.c b/target-m68k/translate.c > index a07b6f5..05efd29 100644 > --- a/target-m68k/translate.c > +++ b/target-m68k/translate.c > @@ -1008,25 +1008,6 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1) > free_cond(&c); > } > > -DISAS_INSN(scc) > -{ > - DisasCompare c; > - int cond; > - TCGv reg, tmp; > - > - cond = (insn >> 8) & 0xf; > - gen_cc_cond(&c, s, cond); > - > - tmp = tcg_temp_new(); > - tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); > - free_cond(&c); > - > - reg = DREG(insn, 0); > - tcg_gen_neg_i32(tmp, tmp); > - tcg_gen_deposit_i32(reg, reg, tmp, 0, 8); > - tcg_temp_free(tmp); > -} > - > /* Force a TB lookup after an instruction that changes the CPU state. */ > static void gen_lookup_tb(DisasContext *s) > { > @@ -1106,6 +1087,48 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) > s->is_jmp = DISAS_TB_JUMP; > } > > +DISAS_INSN(scc) > +{ > + DisasCompare c; > + int cond; > + TCGv tmp; > + > + cond = (insn >> 8) & 0xf; > + gen_cc_cond(&c, s, cond); > + > + tmp = tcg_temp_new(); > + tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); > + free_cond(&c); > + > + tcg_gen_neg_i32(tmp, tmp); > + DEST_EA(env, insn, OS_BYTE, tmp, NULL); > + tcg_temp_free(tmp); > +} This change to scc, to add support for EA, should be in a separate patch from adding dbcc. Otherwise it looks good. r~ > + > +DISAS_INSN(dbcc) > +{ > + TCGLabel *l1; > + TCGv reg; > + TCGv tmp; > + int16_t offset; > + uint32_t base; > + > + reg = DREG(insn, 0); > + base = s->pc; > + offset = (int16_t)read_im16(env, s); > + l1 = gen_new_label(); > + gen_jmpcc(s, (insn >> 8) & 0xf, l1); > + > + tmp = tcg_temp_new(); > + tcg_gen_ext16s_i32(tmp, reg); > + tcg_gen_addi_i32(tmp, tmp, -1); > + gen_partset_reg(OS_WORD, reg, tmp); > + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, -1, l1); > + gen_jmp_tb(s, 1, base + offset); > + gen_set_label(l1); > + gen_jmp_tb(s, 0, s->pc); > +} > + > DISAS_INSN(undef_mac) > { > gen_exception(s, s->pc - 2, EXCP_LINEA); > @@ -3144,7 +3167,9 @@ void register_m68k_insns (CPUM68KState *env) > INSN(jump, 4ec0, ffc0, M68000); > INSN(addsubq, 5000, f080, M68000); > INSN(addsubq, 5080, f0c0, M68000); > - INSN(scc, 50c0, f0f8, CF_ISA_A); > + INSN(scc, 50c0, f0f8, CF_ISA_A); /* Scc.B Dx */ > + INSN(scc, 50c0, f0c0, M68000); /* Scc.B <EA> */ > + INSN(dbcc, 50c8, f0f8, M68000); > INSN(addsubq, 5080, f1c0, CF_ISA_A); > INSN(tpf, 51f8, fff8, CF_ISA_A); > >
diff --git a/target-m68k/translate.c b/target-m68k/translate.c index a07b6f5..05efd29 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1008,25 +1008,6 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1) free_cond(&c); } -DISAS_INSN(scc) -{ - DisasCompare c; - int cond; - TCGv reg, tmp; - - cond = (insn >> 8) & 0xf; - gen_cc_cond(&c, s, cond); - - tmp = tcg_temp_new(); - tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); - free_cond(&c); - - reg = DREG(insn, 0); - tcg_gen_neg_i32(tmp, tmp); - tcg_gen_deposit_i32(reg, reg, tmp, 0, 8); - tcg_temp_free(tmp); -} - /* Force a TB lookup after an instruction that changes the CPU state. */ static void gen_lookup_tb(DisasContext *s) { @@ -1106,6 +1087,48 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) s->is_jmp = DISAS_TB_JUMP; } +DISAS_INSN(scc) +{ + DisasCompare c; + int cond; + TCGv tmp; + + cond = (insn >> 8) & 0xf; + gen_cc_cond(&c, s, cond); + + tmp = tcg_temp_new(); + tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); + free_cond(&c); + + tcg_gen_neg_i32(tmp, tmp); + DEST_EA(env, insn, OS_BYTE, tmp, NULL); + tcg_temp_free(tmp); +} + +DISAS_INSN(dbcc) +{ + TCGLabel *l1; + TCGv reg; + TCGv tmp; + int16_t offset; + uint32_t base; + + reg = DREG(insn, 0); + base = s->pc; + offset = (int16_t)read_im16(env, s); + l1 = gen_new_label(); + gen_jmpcc(s, (insn >> 8) & 0xf, l1); + + tmp = tcg_temp_new(); + tcg_gen_ext16s_i32(tmp, reg); + tcg_gen_addi_i32(tmp, tmp, -1); + gen_partset_reg(OS_WORD, reg, tmp); + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, -1, l1); + gen_jmp_tb(s, 1, base + offset); + gen_set_label(l1); + gen_jmp_tb(s, 0, s->pc); +} + DISAS_INSN(undef_mac) { gen_exception(s, s->pc - 2, EXCP_LINEA); @@ -3144,7 +3167,9 @@ void register_m68k_insns (CPUM68KState *env) INSN(jump, 4ec0, ffc0, M68000); INSN(addsubq, 5000, f080, M68000); INSN(addsubq, 5080, f0c0, M68000); - INSN(scc, 50c0, f0f8, CF_ISA_A); + INSN(scc, 50c0, f0f8, CF_ISA_A); /* Scc.B Dx */ + INSN(scc, 50c0, f0c0, M68000); /* Scc.B <EA> */ + INSN(dbcc, 50c8, f0f8, M68000); INSN(addsubq, 5080, f1c0, CF_ISA_A); INSN(tpf, 51f8, fff8, CF_ISA_A);
Signed-off-by: Laurent Vivier <laurent@vivier.eu> --- target-m68k/translate.c | 65 ++++++++++++++++++++++++++++++++++--------------- 1 file changed, 45 insertions(+), 20 deletions(-)