Message ID | 20161025.224442.1417439049113609110.davem@davemloft.net |
---|---|
State | Accepted |
Delegated to: | David Miller |
Headers | show |
> On 26 Oct 2016, at 03:44, David Miller <davem@davemloft.net> wrote: > > > If the number of pages we are flushing is more than twice the number > of entries in the TSB, just scan the TSB table for matches rather > than probing each and every page in the range. > > Based upon a patch and report by James Clarke. > > Signed-off-by: David S. Miller <davem@davemloft.net> > --- > > James this is the final version I pushed into the tree. Great, thanks. Any progress on TLB flushing? James -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From: James Clarke <jrtc27@jrtc27.com> Date: Wed, 26 Oct 2016 09:28:05 +0100 > Any progress on TLB flushing? I was half-way through an implementation when I noticed that hypervisor TLB flush handler relative branch bug I posted the fix for last night. I'll keep plugging away at it today. -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> On 26 Oct 2016, at 16:54, David Miller <davem@davemloft.net> wrote: > > From: James Clarke <jrtc27@jrtc27.com> > Date: Wed, 26 Oct 2016 09:28:05 +0100 > >> Any progress on TLB flushing? > > I was half-way through an implementation when I noticed that > hypervisor TLB flush handler relative branch bug I posted the > fix for last night. Yep, I saw that. Looks like you forgot to update the comment on __hypervisor_flush_tlb_pending; it still says 16 insns rather than 27. > I'll keep plugging away at it today. Great; let me know if you need a guinea pig, as it’s pretty easy for me to reproduce. Thanks, James-- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From: James Clarke <jrtc27@jrtc27.com> Date: Wed, 26 Oct 2016 17:58:16 +0100 >> On 26 Oct 2016, at 16:54, David Miller <davem@davemloft.net> wrote: >> >> From: James Clarke <jrtc27@jrtc27.com> >> Date: Wed, 26 Oct 2016 09:28:05 +0100 >> >>> Any progress on TLB flushing? >> >> I was half-way through an implementation when I noticed that >> hypervisor TLB flush handler relative branch bug I posted the >> fix for last night. > > Yep, I saw that. Looks like you forgot to update the comment on > __hypervisor_flush_tlb_pending; it still says 16 insns rather than 27. Fixed, thanks. And now I noticed that the cross-call hypervisor tlb flush assembler has the bug and needs to be fixed too... >> I'll keep plugging away at it today. > > Great; let me know if you need a guinea pig, as it’s pretty easy for me to > reproduce. Will do, what kind of cpus do you have?
> On 26 Oct 2016, at 18:09, David Miller <davem@davemloft.net> wrote: > > From: James Clarke <jrtc27@jrtc27.com> > Date: Wed, 26 Oct 2016 17:58:16 +0100 > >>> On 26 Oct 2016, at 16:54, David Miller <davem@davemloft.net> wrote: >>> >>> From: James Clarke <jrtc27@jrtc27.com> >>> Date: Wed, 26 Oct 2016 09:28:05 +0100 >>> >>>> Any progress on TLB flushing? >>> >>> I'll keep plugging away at it today. >> >> Great; let me know if you need a guinea pig, as it’s pretty easy for me to >> reproduce. > > Will do, what kind of cpus do you have? * UltraSparc T5 (Niagara5) * UltraSparc T1 (Niagara) * UltraSPARC IIIi The IIIi seems to be down at the moment though. James -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/sparc/mm/tsb.c b/arch/sparc/mm/tsb.c index f2b7711..e20fbba 100644 --- a/arch/sparc/mm/tsb.c +++ b/arch/sparc/mm/tsb.c @@ -27,6 +27,20 @@ static inline int tag_compare(unsigned long tag, unsigned long vaddr) return (tag == (vaddr >> 22)); } +static void flush_tsb_kernel_range_scan(unsigned long start, unsigned long end) +{ + unsigned long idx; + + for (idx = 0; idx < KERNEL_TSB_NENTRIES; idx++) { + struct tsb *ent = &swapper_tsb[idx]; + unsigned long match = idx << 13; + + match |= (ent->tag << 22); + if (match >= start && match < end) + ent->tag = (1UL << TSB_TAG_INVALID_BIT); + } +} + /* TSB flushes need only occur on the processor initiating the address * space modification, not on each cpu the address space has run on. * Only the TLB flush needs that treatment. @@ -36,6 +50,9 @@ void flush_tsb_kernel_range(unsigned long start, unsigned long end) { unsigned long v; + if ((end - start) >> PAGE_SHIFT >= 2 * KERNEL_TSB_NENTRIES) + return flush_tsb_kernel_range_scan(start, end); + for (v = start; v < end; v += PAGE_SIZE) { unsigned long hash = tsb_hash(v, PAGE_SHIFT, KERNEL_TSB_NENTRIES);
If the number of pages we are flushing is more than twice the number of entries in the TSB, just scan the TSB table for matches rather than probing each and every page in the range. Based upon a patch and report by James Clarke. Signed-off-by: David S. Miller <davem@davemloft.net> --- James this is the final version I pushed into the tree. arch/sparc/mm/tsb.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)