From patchwork Thu Oct 21 09:18:56 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: PATCH: PR target/45946: ICE: in extract_insn, at recog.c:2127 when using _Decimal128 with -Os -fno-omit-frame-pointer From: Uros Bizjak X-Patchwork-Id: 68557 Message-Id: To: "H.J. Lu" Cc: gcc-patches@gcc.gnu.org Date: Thu, 21 Oct 2010 11:18:56 +0200 On Thu, Oct 21, 2010 at 8:32 AM, Uros Bizjak wrote: > On Wed, Oct 20, 2010 at 8:02 PM, H.J. Lu wrote: > >> pushtd1 is missing.  This patch adds it. OK for 4.4/4.5/trunk? > > Actually, it looks that something is missing, so generic part of gcc > doesn't push the value in TImode. TDmode values are moved as TImode, > so they should also be pushed via equivalent integer mode (TImode). > > Looking at the .md files, TImode push (pushti1) is also missing. I > will investigate this a bit more. Attached patch produces substantially better code for the testcase. The approach with expander generates: 0000000000000000 : 0: 55 push %rbp 1: 48 ba 00 00 00 00 00 mov $0x3040000000000000,%rdx 8: 00 40 30 b: 0f 28 3d 00 00 00 00 movaps 0x0(%rip),%xmm7 # 12 12: 48 89 e5 mov %rsp,%rbp 15: 50 push %rax 16: 0f 28 f7 movaps %xmm7,%xmm6 19: 0f 28 ef movaps %xmm7,%xmm5 1c: 50 push %rax 1d: 0f 28 e7 movaps %xmm7,%xmm4 20: 0f 28 df movaps %xmm7,%xmm3 23: 0f 28 d7 movaps %xmm7,%xmm2 26: 0f 28 cf movaps %xmm7,%xmm1 29: 0f 28 c7 movaps %xmm7,%xmm0 2c: 48 c7 04 24 00 00 00 movq $0x0,(%rsp) 33: 00 34: 48 89 54 24 08 mov %rdx,0x8(%rsp) 39: e8 00 00 00 00 callq 3e 3e: 59 pop %rcx 3f: 5e pop %rsi 40: c9 leaveq 41: c3 retq and the new approach with a post-reload splitter: 0000000000000000 : 0: 55 push %rbp 1: 48 b8 00 00 00 00 00 mov $0x3040000000000000,%rax 8: 00 40 30 b: 0f 28 3d 00 00 00 00 movaps 0x0(%rip),%xmm7 # 12 12: 48 89 e5 mov %rsp,%rbp 15: 50 push %rax 16: 0f 28 f7 movaps %xmm7,%xmm6 19: 0f 28 ef movaps %xmm7,%xmm5 1c: 6a 00 pushq $0x0 1e: 0f 28 e7 movaps %xmm7,%xmm4 21: 0f 28 df movaps %xmm7,%xmm3 24: 0f 28 d7 movaps %xmm7,%xmm2 27: 0f 28 cf movaps %xmm7,%xmm1 2a: 0f 28 c7 movaps %xmm7,%xmm0 2d: e8 00 00 00 00 callq 32 32: 5a pop %rdx 33: 59 pop %rcx 34: c9 leaveq 35: c3 retq So, 2 insns less and 12 bytes smaller code. 2010-10-21 Uros Bizjak PR target/45946 * config/i386/i386.md (*pushti2): New insn pattern. (pushti2 splitter): New insn splitter. (*push2): Macroize insn pattern from *push{di,ti}2 using DWI mode iterator. testsuite/ChangeLog: 2010-10-21 Uros Bizjak H.J. Lu PR target/45946 * gcc.target/i386/pr45946.c: New test. Patch is currently in regression test on x86_64-pc-linux-gnu {,-m32}. Will be committed to SVN mainline and backported to 4.4/4.5 after a few days. Uros. Index: i386.md =================================================================== --- i386.md (revision 165750) +++ i386.md (working copy) @@ -1602,6 +1602,20 @@ ;; Push/pop instructions. +(define_insn "*push2" + [(set (match_operand:DWI 0 "push_operand" "=<") + (match_operand:DWI 1 "general_no_elim_operand" "riF*m"))] + "" + "#") + +(define_split + [(set (match_operand:TI 0 "push_operand" "") + (match_operand:TI 1 "general_operand" ""))] + "TARGET_64BIT && reload_completed + && !SSE_REG_P (operands[1])" + [(const_int 0)] + "ix86_split_long_move (operands); DONE;") + (define_insn "*pushdi2_rex64" [(set (match_operand:DI 0 "push_operand" "=<,!<") (match_operand:DI 1 "general_no_elim_operand" "re*m,n"))] @@ -1660,12 +1674,6 @@ GEN_INT (4))); }) -(define_insn "*pushdi2" - [(set (match_operand:DI 0 "push_operand" "=<") - (match_operand:DI 1 "general_no_elim_operand" "riF*m"))] - "!TARGET_64BIT" - "#") - (define_split [(set (match_operand:DI 0 "push_operand" "") (match_operand:DI 1 "general_operand" ""))]