From patchwork Thu Oct 21 08:47:06 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hidetoshi Seto X-Patchwork-Id: 68553 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C3A20B6EF0 for ; Thu, 21 Oct 2010 19:49:55 +1100 (EST) Received: from localhost ([127.0.0.1]:42519 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1P8qqN-0003wt-PF for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2010 04:49:51 -0400 Received: from [140.186.70.92] (port=49544 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1P8qnv-0003G4-2B for qemu-devel@nongnu.org; Thu, 21 Oct 2010 04:47:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1P8qnt-0000rZ-Pc for qemu-devel@nongnu.org; Thu, 21 Oct 2010 04:47:18 -0400 Received: from fgwmail7.fujitsu.co.jp ([192.51.44.37]:37228) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1P8qnt-0000rQ-8F for qemu-devel@nongnu.org; Thu, 21 Oct 2010 04:47:17 -0400 Received: from m6.gw.fujitsu.co.jp ([10.0.50.76]) by fgwmail7.fujitsu.co.jp (Fujitsu Gateway) with ESMTP id o9L8lE8B028870 for (envelope-from seto.hidetoshi@jp.fujitsu.com); Thu, 21 Oct 2010 17:47:15 +0900 Received: from smail (m6 [127.0.0.1]) by outgoing.m6.gw.fujitsu.co.jp (Postfix) with ESMTP id 9873345DE54 for ; Thu, 21 Oct 2010 17:47:14 +0900 (JST) Received: from s6.gw.fujitsu.co.jp (s6.gw.fujitsu.co.jp [10.0.50.96]) by m6.gw.fujitsu.co.jp (Postfix) with ESMTP id 7383645DE4C for ; Thu, 21 Oct 2010 17:47:14 +0900 (JST) Received: from s6.gw.fujitsu.co.jp (localhost.localdomain [127.0.0.1]) by s6.gw.fujitsu.co.jp (Postfix) with ESMTP id 515F21DB8012 for ; Thu, 21 Oct 2010 17:47:14 +0900 (JST) Received: from ml14.s.css.fujitsu.com (ml14.s.css.fujitsu.com [10.249.87.104]) by s6.gw.fujitsu.co.jp (Postfix) with ESMTP id 04FFB1DB801A for ; Thu, 21 Oct 2010 17:47:14 +0900 (JST) Received: from ml14.css.fujitsu.com (ml14 [127.0.0.1]) by ml14.s.css.fujitsu.com (Postfix) with ESMTP id C9BF29F6B36; Thu, 21 Oct 2010 17:47:13 +0900 (JST) Received: from [127.0.0.1] (unknown [10.124.101.84]) by ml14.s.css.fujitsu.com (Postfix) with ESMTP id 19C4D9F6B39; Thu, 21 Oct 2010 17:47:13 +0900 (JST) X-SecurityPolicyCheck-FJ: OK by FujitsuOutboundMailChecker v1.3.1 Received: from FMVDA2A041[10.124.101.84] by FMVDA2A041 (FujitsuOutboundMailChecker v1.3.1/9992[10.124.101.84]); Thu, 21 Oct 2010 17:47:13 +0900 (JST) Message-ID: <4CBFFE0A.1040709@jp.fujitsu.com> Date: Thu, 21 Oct 2010 17:47:06 +0900 From: Hidetoshi Seto User-Agent: Mozilla/5.0 (Windows; U; Windows NT 6.0; ja; rv:1.9.2.9) Gecko/20100915 Thunderbird/3.1.4 MIME-Version: 1.0 To: "qemu-devel@nongnu.org" X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) Cc: Jin Dongming , Dean Nelson , Marcelo Tosatti , "kvm@vger.kernel.org" , Huang Ying Subject: [Qemu-devel] [PATCH] x86, mce: broadcast mce depending on the cpu version X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org There is no reason why SRAO event received by the main thread is the only one that being broadcasted. According to the x86 ASDM vol.3A 15.10.4.1, MCE signal is broadcast on processor version 06H_EH or later. This change is required to handle SRAR in smp guests. Signed-off-by: Hidetoshi Seto --- target-i386/kvm.c | 29 ++++++++++++++++++++++++----- 1 files changed, 24 insertions(+), 5 deletions(-) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index a0d0603..00bb083 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -1637,6 +1637,28 @@ static void hardware_memory_error(void) exit(1); } +#ifdef KVM_CAP_MCE +static void kvm_mce_broadcast_rest(CPUState *env) +{ + CPUState *cenv; + int family, model, cpuver = env->cpuid_version; + + family = (cpuver >> 8) & 0xf; + model = ((cpuver >> 12) & 0xf0) + ((cpuver >> 4) & 0xf); + + /* Broadcast MCA signal for processor version 06H_EH and above */ + if ((family == 6 && model >= 14) || family > 6) { + if (cenv == env) { + continue; + } + for (cenv = first_cpu; cenv != NULL; cenv = cenv->next_cpu) { + kvm_inject_x86_mce(cenv, 1, MCI_STATUS_VAL | MCI_STATUS_UC, + MCG_STATUS_MCIP | MCG_STATUS_RIPV, 0, 0, 1); + } + } +} +#endif + int kvm_on_sigbus_vcpu(CPUState *env, int code, void *addr) { #if defined(KVM_CAP_MCE) @@ -1694,6 +1716,7 @@ int kvm_on_sigbus_vcpu(CPUState *env, int code, void *addr) fprintf(stderr, "kvm_set_mce: %s\n", strerror(errno)); abort(); } + kvm_mce_broadcast_rest(env); } else #endif { @@ -1716,7 +1739,6 @@ int kvm_on_sigbus(int code, void *addr) void *vaddr; ram_addr_t ram_addr; target_phys_addr_t paddr; - CPUState *cenv; /* Hope we are lucky for AO MCE */ vaddr = addr; @@ -1732,10 +1754,7 @@ int kvm_on_sigbus(int code, void *addr) kvm_inject_x86_mce(first_cpu, 9, status, MCG_STATUS_MCIP | MCG_STATUS_RIPV, paddr, (MCM_ADDR_PHYS << 6) | 0xc, 1); - for (cenv = first_cpu->next_cpu; cenv != NULL; cenv = cenv->next_cpu) { - kvm_inject_x86_mce(cenv, 1, MCI_STATUS_VAL | MCI_STATUS_UC, - MCG_STATUS_MCIP | MCG_STATUS_RIPV, 0, 0, 1); - } + kvm_mce_broadcast_rest(first_cpu); } else #endif {