From patchwork Wed Oct 20 17:43:46 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Tosatti X-Patchwork-Id: 68458 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 05EFEB70D0 for ; Thu, 21 Oct 2010 04:55:05 +1100 (EST) Received: from localhost ([127.0.0.1]:54960 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1P8csP-0006IR-UJ for incoming@patchwork.ozlabs.org; Wed, 20 Oct 2010 13:55:02 -0400 Received: from [140.186.70.92] (port=37395 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1P8cir-0000Ns-EA for qemu-devel@nongnu.org; Wed, 20 Oct 2010 13:45:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1P8cin-000653-9t for qemu-devel@nongnu.org; Wed, 20 Oct 2010 13:45:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36103) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1P8cin-00064m-2a for qemu-devel@nongnu.org; Wed, 20 Oct 2010 13:45:05 -0400 Received: from int-mx03.intmail.prod.int.phx2.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.16]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o9KHj3uH005080 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 20 Oct 2010 13:45:03 -0400 Received: from ns3.rdu.redhat.com (ns3.rdu.redhat.com [10.11.255.199]) by int-mx03.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o9KHj3XG032298; Wed, 20 Oct 2010 13:45:03 -0400 Received: from amt.cnet (vpn-9-16.rdu.redhat.com [10.11.9.16]) by ns3.rdu.redhat.com (8.13.8/8.13.8) with ESMTP id o9KHj2OV019217; Wed, 20 Oct 2010 13:45:02 -0400 Received: from amt.cnet (localhost.localdomain [127.0.0.1]) by amt.cnet (Postfix) with ESMTP id AE9346561E8; Wed, 20 Oct 2010 15:44:42 -0200 (BRST) Received: (from marcelo@localhost) by amt.cnet (8.14.4/8.14.4/Submit) id o9KHiefs003561; Wed, 20 Oct 2010 15:44:40 -0200 From: Marcelo Tosatti To: Anthony Liguori Date: Wed, 20 Oct 2010 15:43:46 -0200 Message-Id: <2d7082283bc5cc2ed45e0bef33d66abc3a96c7fd.1287596626.git.mtosatti@redhat.com> In-Reply-To: References: X-Scanned-By: MIMEDefang 2.67 on 10.5.11.16 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. Cc: Marcelo Tosatti , qemu-devel@nongnu.org, kvm@vger.kernel.org, Avi Kivity Subject: [Qemu-devel] [PATCH 09/10] Add savevm/loadvm support for MCE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Port qemu-kvm's commit 1bab5d11545d8de5facf46c28630085a2f9651ae Author: Huang Ying Date: Wed Mar 3 16:52:46 2010 +0800 Add savevm/loadvm support for MCE MCE registers are saved/load into/from CPUState in kvm_arch_save/load_regs. To simulate the MCG_STATUS clearing upon reset, MSR_MCG_STATUS is set to 0 for KVM_PUT_RESET_STATE. Signed-off-by: Marcelo Tosatti Signed-off-by: Avi Kivity --- target-i386/kvm.c | 39 ++++++++++++++++++++++++++++++++++++++- 1 files changed, 38 insertions(+), 1 deletions(-) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 8e26bc4..1701cb9 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -777,7 +777,7 @@ static int kvm_put_msrs(CPUState *env, int level) struct kvm_msr_entry entries[100]; } msr_data; struct kvm_msr_entry *msrs = msr_data.entries; - int n = 0; + int i, n = 0; kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs); kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp); @@ -797,6 +797,18 @@ static int kvm_put_msrs(CPUState *env, int level) env->system_time_msr); kvm_msr_entry_set(&msrs[n++], MSR_KVM_WALL_CLOCK, env->wall_clock_msr); } +#ifdef KVM_CAP_MCE + if (env->mcg_cap) { + if (level == KVM_PUT_RESET_STATE) + kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status); + else if (level == KVM_PUT_FULL_STATE) { + kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status); + kvm_msr_entry_set(&msrs[n++], MSR_MCG_CTL, env->mcg_ctl); + for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) + kvm_msr_entry_set(&msrs[n++], MSR_MC0_CTL + i, env->mce_banks[i]); + } + } +#endif msr_data.info.nmsrs = n; @@ -1004,6 +1016,15 @@ static int kvm_get_msrs(CPUState *env) msrs[n++].index = MSR_KVM_SYSTEM_TIME; msrs[n++].index = MSR_KVM_WALL_CLOCK; +#ifdef KVM_CAP_MCE + if (env->mcg_cap) { + msrs[n++].index = MSR_MCG_STATUS; + msrs[n++].index = MSR_MCG_CTL; + for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) + msrs[n++].index = MSR_MC0_CTL + i; + } +#endif + msr_data.info.nmsrs = n; ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data); if (ret < 0) @@ -1046,6 +1067,22 @@ static int kvm_get_msrs(CPUState *env) case MSR_KVM_WALL_CLOCK: env->wall_clock_msr = msrs[i].data; break; +#ifdef KVM_CAP_MCE + case MSR_MCG_STATUS: + env->mcg_status = msrs[i].data; + break; + case MSR_MCG_CTL: + env->mcg_ctl = msrs[i].data; + break; +#endif + default: +#ifdef KVM_CAP_MCE + if (msrs[i].index >= MSR_MC0_CTL && + msrs[i].index < MSR_MC0_CTL + (env->mcg_cap & 0xff) * 4) { + env->mce_banks[msrs[i].index - MSR_MC0_CTL] = msrs[i].data; + break; + } +#endif } }