Patchwork [v6,12/12] x3130/downstream: support aer.

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Submitter Isaku Yamahata
Date Oct. 20, 2010, 8:19 a.m.
Message ID <22861084c7500bc73e9199bf9568014a4be85f09.1287562197.git.yamahata@valinux.co.jp>
Download mbox | patch
Permalink /patch/68405/
State New
Headers show

Comments

Isaku Yamahata - Oct. 20, 2010, 8:19 a.m.
add aer support.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/xio3130_downstream.c |   15 ++++++++++-----
 1 files changed, 10 insertions(+), 5 deletions(-)

Patch

diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
index a44e188..9087c0b 100644
--- a/hw/xio3130_downstream.c
+++ b/hw/xio3130_downstream.c
@@ -40,12 +40,14 @@  static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address,
 {
     uint16_t sltctl =
         pci_get_word(d->config + d->exp.exp_cap + PCI_EXP_SLTCTL);
+    uint32_t uncorsta =
+        pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_UNCOR_STATUS);
 
     pci_bridge_write_config(d, address, val, len);
     pcie_cap_flr_write_config(d, address, val, len);
     pcie_cap_slot_write_config(d, address, val, len, sltctl);
     msi_write_config(d, address, val, len);
-    /* TODO: AER */
+    pcie_aer_write_config(d, address, val, len, uncorsta);
 }
 
 static void xio3130_downstream_reset(DeviceState *qdev)
@@ -100,14 +102,14 @@  static int xio3130_downstream_initfn(PCIDevice *d)
         return rc;
     }
     pcie_cap_ari_init(d);
-    /* TODO: AER */
+    pcie_aer_init(d, XIO3130_AER_OFFSET);
 
     return 0;
 }
 
 static int xio3130_downstream_exitfn(PCIDevice *d)
 {
-    /* TODO: AER */
+    pcie_aer_exit(d);
     msi_uninit(d);
     pcie_cap_exit(d);
     return pci_bridge_exitfn(d);
@@ -146,7 +148,8 @@  static const VMStateDescription vmstate_xio3130_downstream = {
     .minimum_version_id_old = 1,
     .fields = (VMStateField[]) {
         VMSTATE_PCIE_DEVICE(port.br.dev, PCIESlot),
-        /* TODO: AER */
+        VMSTATE_STRUCT(port.br.dev.exp.aer_log, PCIESlot, 0,
+                       vmstate_pcie_aer_log, PCIEAERLog),
         VMSTATE_END_OF_LIST()
     }
 };
@@ -168,7 +171,9 @@  static PCIDeviceInfo xio3130_downstream_info = {
         DEFINE_PROP_UINT8("port", PCIESlot, port.port, 0),
         DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
         DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
-        /* TODO: AER */
+        DEFINE_PROP_UINT16("aer_log_max", PCIESlot,
+                           port.br.dev.exp.aer_log.log_max,
+                           PCIE_AER_LOG_MAX_DEFAULT),
         DEFINE_PROP_END_OF_LIST(),
     }
 };