| Message ID | 1476445233-26524-3-git-send-email-Raju.Lakkaraju@microsemi.com |
|---|---|
| State | Changes Requested, archived |
| Delegated to: | David Miller |
| Headers | show |
> On Fri, Oct 14, 2016 at 05:10:33PM +0530, Raju Lakkaraju wrote: > From: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> > > VSC8531 Fast Link Failure 2 feature enables the PHY to indicate the > onset of a potential link failure in < 100 usec for 100BASE-TX > operation. FLF2 is supported through the MDINT (active low) pin. Is the MDINT pin specific to this feature, or a general interrupt pin? Device tree is used to describe the hardware. It should not really describe software or configuration. But the borders are a bit fluffly. Signal edge rates is near to hardware. This is a lot more towards configuration. So i'm not sure a device tree property is the correct way to describe this. This is also a feature i know other PHYs support. The Marvell PHY has a "Metro Ethernet" extension which allows it to report link failures for 1000BASE-T in 10, 20 or 40ms, instead of the usual 750ms. So we need a generic solution other PHYs can implement. As with cable testing, i think it should be an ethtool option. Andrew
Hi Andrew, Thank you for code review and comments. On Fri, Oct 14, 2016 at 02:02:28PM +0200, Andrew Lunn wrote: > EXTERNAL EMAIL > > > > On Fri, Oct 14, 2016 at 05:10:33PM +0530, Raju Lakkaraju wrote: > > From: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> > > > > VSC8531 Fast Link Failure 2 feature enables the PHY to indicate the > > onset of a potential link failure in < 100 usec for 100BASE-TX > > operation. FLF2 is supported through the MDINT (active low) pin. > > Is the MDINT pin specific to this feature, or a general interrupt pin? > MDINT pin is general interrupt. MDINT pin share the interrupt with FLF2 along with another 13 interrupts. > Device tree is used to describe the hardware. It should not really > describe software or configuration. But the borders are a bit > fluffly. Signal edge rates is near to hardware. This is a lot more > towards configuration. So i'm not sure a device tree property is the > correct way to describe this. > > This is also a feature i know other PHYs support. The Marvell PHY has > a "Metro Ethernet" extension which allows it to report link failures > for 1000BASE-T in 10, 20 or 40ms, instead of the usual 750ms. So we > need a generic solution other PHYs can implement. > > As with cable testing, i think it should be an ethtool option. I agree with you. I thought this is one time initialization either enable or disable. if customer need this feature, they can enable in DT. Do you want me to implement through IOCTL instead of Device tree? Do you have any other suggestions? > > Andrew --- Thanks, Raju.
On October 17, 2016 1:13:14 AM PDT, Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> wrote: >Hi Andrew, > >Thank you for code review and comments. > >On Fri, Oct 14, 2016 at 02:02:28PM +0200, Andrew Lunn wrote: >> EXTERNAL EMAIL >> >> >> > On Fri, Oct 14, 2016 at 05:10:33PM +0530, Raju Lakkaraju wrote: >> > From: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> >> > >> > VSC8531 Fast Link Failure 2 feature enables the PHY to indicate the >> > onset of a potential link failure in < 100 usec for 100BASE-TX >> > operation. FLF2 is supported through the MDINT (active low) pin. >> >> Is the MDINT pin specific to this feature, or a general interrupt >pin? >> > >MDINT pin is general interrupt. MDINT pin share the interrupt with >FLF2 along with another 13 interrupts. > >> Device tree is used to describe the hardware. It should not really >> describe software or configuration. But the borders are a bit >> fluffly. Signal edge rates is near to hardware. This is a lot more >> towards configuration. So i'm not sure a device tree property is the >> correct way to describe this. >> >> This is also a feature i know other PHYs support. The Marvell PHY has >> a "Metro Ethernet" extension which allows it to report link failures >> for 1000BASE-T in 10, 20 or 40ms, instead of the usual 750ms. So we >> need a generic solution other PHYs can implement. >> >> As with cable testing, i think it should be an ethtool option. > >I agree with you. >I thought this is one time initialization either enable or disable. >if customer need this feature, they can enable in DT. >Do you want me to implement through IOCTL instead of Device tree? >Do you have any other suggestions? As indicated in the other email about speed downshift, we may want to utilize ethtool's ability to modify tunable parameters (small integer, boolean, values) and extend it to cover features offered by PHYs in a way that an user can dynamically turn these features on or off. In fact, this looks a lot like netdev features (e.g: checksum offload), and there seems to be some commonality here between at least Marvell and Microsemi (for the faster link down reporting), so maybe we should start adding PHY features similar to netdev features?
Hi Florian, Thank you for review comments. On Mon, Oct 17, 2016 at 05:51:11AM -0700, Florian Fainelli wrote: > EXTERNAL EMAIL > > > On October 17, 2016 1:13:14 AM PDT, Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> wrote: > >Hi Andrew, > > > >Thank you for code review and comments. > > > >On Fri, Oct 14, 2016 at 02:02:28PM +0200, Andrew Lunn wrote: > >> EXTERNAL EMAIL > >> > >> > >> > On Fri, Oct 14, 2016 at 05:10:33PM +0530, Raju Lakkaraju wrote: > >> > From: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com> > >> > > >> > VSC8531 Fast Link Failure 2 feature enables the PHY to indicate the > >> > onset of a potential link failure in < 100 usec for 100BASE-TX > >> > operation. FLF2 is supported through the MDINT (active low) pin. > >> > >> Is the MDINT pin specific to this feature, or a general interrupt > >pin? > >> > > > >MDINT pin is general interrupt. MDINT pin share the interrupt with > >FLF2 along with another 13 interrupts. > > > >> Device tree is used to describe the hardware. It should not really > >> describe software or configuration. But the borders are a bit > >> fluffly. Signal edge rates is near to hardware. This is a lot more > >> towards configuration. So i'm not sure a device tree property is the > >> correct way to describe this. > >> > >> This is also a feature i know other PHYs support. The Marvell PHY has > >> a "Metro Ethernet" extension which allows it to report link failures > >> for 1000BASE-T in 10, 20 or 40ms, instead of the usual 750ms. So we > >> need a generic solution other PHYs can implement. > >> > >> As with cable testing, i think it should be an ethtool option. > > > >I agree with you. > >I thought this is one time initialization either enable or disable. > >if customer need this feature, they can enable in DT. > >Do you want me to implement through IOCTL instead of Device tree? > >Do you have any other suggestions? > > As indicated in the other email about speed downshift, we may want to utilize ethtool's ability to modify tunable parameters (small integer, boolean, values) and extend it to cover features offered by PHYs in a way that an user can dynamically turn these features on or off. > > In fact, this looks a lot like netdev features (e.g: checksum offload), and there seems to be some commonality here between at least Marvell and Microsemi (for the faster link down reporting), so maybe we should start adding PHY features similar to netdev features? > Sure. I would like add one flag in phy_device structure: u64 phy_features; In phy_driver structure, i would like to add 2 function pointer as int (*phy_featues_set)(struct phy_device *phydev); int (*phy_featues_get)(struct phy_device *phydev); All the PHY specific features i.e. Fast link failure -2, Downshift, Loopback etc are the case in feature_set/feature_get functions. Is it ok? > -- > Florian --- Thanks, Raju.
> > In fact, this looks a lot like netdev features (e.g: checksum > > offload), and there seems to be some commonality here between at > > least Marvell and Microsemi (for the faster link down reporting), > > so maybe we should start adding PHY features similar to netdev > > features? > Sure. > > I would like add one flag in phy_device structure: > u64 phy_features; > > In phy_driver structure, i would like to add 2 function pointer as > > int (*phy_featues_set)(struct phy_device *phydev); > int (*phy_featues_get)(struct phy_device *phydev); > > All the PHY specific features i.e. Fast link failure -2, Downshift, Loopback etc > are the case in feature_set/feature_get functions. Please follow how the ethertool features are implemented. So you need to extend net/core/ethtool.c to pass these call down, etc. Andrew
Hi Andrew, On Tue, Oct 18, 2016 at 12:58:20PM +0200, Andrew Lunn wrote: > EXTERNAL EMAIL > > > > > In fact, this looks a lot like netdev features (e.g: checksum > > > offload), and there seems to be some commonality here between at > > > least Marvell and Microsemi (for the faster link down reporting), > > > so maybe we should start adding PHY features similar to netdev > > > features? > > > Sure. > > > > I would like add one flag in phy_device structure: > > u64 phy_features; > > > > In phy_driver structure, i would like to add 2 function pointer as > > > > int (*phy_featues_set)(struct phy_device *phydev); > > int (*phy_featues_get)(struct phy_device *phydev); > > > > All the PHY specific features i.e. Fast link failure -2, Downshift, Loopback etc > > are the case in feature_set/feature_get functions. > > Please follow how the ethertool features are implemented. So you need > to extend net/core/ethtool.c to pass these call down, etc. > Sure. I will do. Do i need to change Ethtool application and submit along with downshift driver patch (i.e. ethtool.c, phy.c, cpsw.c and mscc.c changes) ? > Andrew --- Thanks, Raju.
> Do i need to change Ethtool application and submit along with > downshift driver patch (i.e. ethtool.c, phy.c, cpsw.c and mscc.c changes) ? Yes, please submit two patchset. One patchset for ethtool and its man page and a second patchset for all the kernel changes. Thanks Andrew
diff --git a/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt index 062d115..472fc68 100644 --- a/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt +++ b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt @@ -32,6 +32,11 @@ Optional properties: after a 'downshift-cnt' of failed attempts at 1000BAST-T. Allowed values: 0, 2, 3, 4, 5. 0 is default and will disable downshifting. +- flf2 : Fast Link Failure 2 (FLF2) feature enables the PHY + to indicate the onset of a potential link failure in + < 100 usec for 100BASE-TX operation. FLF2 is + supported through the MDINT (active low) pin. + Default will be disable flf2. Table: 1 - Edge rate change ----------------------------------------------------------------| @@ -66,4 +71,5 @@ Example: vsc8531,vddmac = <3300>; vsc8531,edge-slowdown = <7>; vsc8531,downshift-cnt = <3>; + vsc8531,flf2; }; diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c index e87d9f0..57bd628 100644 --- a/drivers/net/phy/mscc.c +++ b/drivers/net/phy/mscc.c @@ -57,6 +57,7 @@ enum rgmii_rx_clock_delay { /* Extended Page 2 Registers */ #define MSCC_PHY_RGMII_CNTL 20 +#define FLF2_ENABLE 0x8000 #define RGMII_RX_CLK_DELAY_MASK 0x0070 #define RGMII_RX_CLK_DELAY_POS 4 @@ -83,6 +84,7 @@ enum rgmii_rx_clock_delay { struct vsc8531_private { int rate_magic; u8 downshift_magic; + bool flf2; /* Fast Link Failure-2 Enable/Disable */ }; #ifdef CONFIG_OF_MDIO @@ -107,6 +109,33 @@ static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page) return rc; } +static int vsc85xx_flf2_set(struct phy_device *phydev, bool op) +{ + int rc; + u16 reg_val; + + mutex_lock(&phydev->lock); + rc = vsc85xx_phy_page_set(phydev, MSCC_PHY_PAGE_EXTENDED_2); + if (rc != 0) + goto out_unlock; + + reg_val = phy_read(phydev, MSCC_PHY_RGMII_CNTL); + if (op) + reg_val |= FLF2_ENABLE; + else + reg_val &= ~FLF2_ENABLE; + rc = phy_write(phydev, MSCC_PHY_RGMII_CNTL, reg_val); + if (rc != 0) + goto out_unlock; + + rc = vsc85xx_phy_page_set(phydev, MSCC_PHY_PAGE_STANDARD); + +out_unlock: + mutex_unlock(&phydev->lock); + + return rc; +} + static int vsc85xx_downshift_set(struct phy_device *phydev, u8 magic) { int rc; @@ -412,6 +441,10 @@ static int vsc85xx_config_init(struct phy_device *phydev) if (rc) return rc; + rc = vsc85xx_flf2_set(phydev, vsc8531->flf2); + if (rc) + return rc; + rc = genphy_config_init(phydev); return rc; @@ -449,6 +482,11 @@ static int vsc85xx_probe(struct phy_device *phydev) int rate_magic; int downshift_magic; struct vsc8531_private *vsc8531; + struct device *dev = &phydev->mdio.dev; + struct device_node *of_node = dev->of_node; + + if (!of_node) + return -ENODEV; rate_magic = vsc85xx_edge_rate_magic_get(phydev); if (rate_magic < 0) @@ -466,6 +504,13 @@ static int vsc85xx_probe(struct phy_device *phydev) vsc8531->rate_magic = rate_magic; vsc8531->downshift_magic = downshift_magic; +#ifdef CONFIG_OF_MDIO + /* Fast Link Failure 2 */ + vsc8531->flf2 = of_property_read_bool(of_node, "vsc8531,flf2"); +#else + vsc8531->flf2 = 0; +#endif + return 0; }