Patchwork Fix bug in translation of REVSH

login
register
mail settings
Submitter Johan Bengtsson
Date Oct. 18, 2010, 12:49 p.m.
Message ID <1287406176-13554-1-git-send-email-teofrastius@gmail.com>
Download mbox | patch
Permalink /patch/68177/
State New
Headers show

Comments

Johan Bengtsson - Oct. 18, 2010, 12:49 p.m.
The translation of REVSH shifted the low byte 8 steps left before performing
an 8-bit sign extend, causing this part of the expression to alwas be 0.
The fix for this is either to extend before shifting or switch to a 16-bit
extend. I choose the former.

Signed-off-by: Johan Bengtsson <teofrastius@gmail.com>
---
 target-arm/translate.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
Aurelien Jarno - Dec. 27, 2010, 6:57 p.m.
On Mon, Oct 18, 2010 at 02:49:36PM +0200, Johan Bengtsson wrote:
> The translation of REVSH shifted the low byte 8 steps left before performing
> an 8-bit sign extend, causing this part of the expression to alwas be 0.
> The fix for this is either to extend before shifting or switch to a 16-bit
> extend. I choose the former.
> 
> Signed-off-by: Johan Bengtsson <teofrastius@gmail.com>
> ---
>  target-arm/translate.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)

Thanks for this patch. While it is correct, I have committed a different
fix using tcg_gen_bswap16, so that the generated code can be optimized
on some hosts.

> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 652cac9..e2fa4df 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -253,8 +253,8 @@ static void gen_revsh(TCGv var)
>      TCGv tmp = new_tmp();
>      tcg_gen_shri_i32(tmp, var, 8);
>      tcg_gen_andi_i32(tmp, tmp, 0x00ff);
> -    tcg_gen_shli_i32(var, var, 8);
>      tcg_gen_ext8s_i32(var, var);
> +    tcg_gen_shli_i32(var, var, 8);
>      tcg_gen_or_i32(var, var, tmp);
>      dead_tmp(tmp);
>  }
> -- 
> 1.7.0.4
> 
> 
>

Patch

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 652cac9..e2fa4df 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -253,8 +253,8 @@  static void gen_revsh(TCGv var)
     TCGv tmp = new_tmp();
     tcg_gen_shri_i32(tmp, var, 8);
     tcg_gen_andi_i32(tmp, tmp, 0x00ff);
-    tcg_gen_shli_i32(var, var, 8);
     tcg_gen_ext8s_i32(var, var);
+    tcg_gen_shli_i32(var, var, 8);
     tcg_gen_or_i32(var, var, tmp);
     dead_tmp(tmp);
 }