| Message ID | b5f67ba76018314d08e240f95951751896687d37.1474986045.git-series.andrew@aj.id.au |
|---|---|
| State | Accepted, archived |
| Delegated to: | Joel Stanley |
| Headers | show |
On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au> wrote: > Two LPC-related signals in the AST2400 depend on state in the SuperIO IP > block. Use the recently added infrastructure to capture this > relationship. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Patch applied for v4.10. (Tell me if I'm applying patches in wrong order or something, and I hope this doesn't clash with the fixes.) Yours, Linus Walleij
Hi Linus, On Thu, 2016-10-20 at 13:53 +0200, Linus Walleij wrote: > On Tue, Sep 27, 2016 at 4:50 PM, Andrew Jeffery <andrew@aj.id.au> > wrote: > > > > > Two LPC-related signals in the AST2400 depend on state in the > > SuperIO IP > > block. Use the recently added infrastructure to capture this > > relationship. > > > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > Patch applied for v4.10. > (Tell me if I'm applying patches in wrong order or something, and > I hope this doesn't clash with the fixes.) Both this patch and 8/8 functionally depend on 5/8. I fetched the pinctrl tree to poke around but this patch didn't appear in any of the updated branches, so I'm not sure whether we have the right ordering. Without it we should hit build failures from missing macro definitions. Have you had a chance to look over patch 5/8? Joel wasn't keen on its current form, so I would appreciate your input. Cheers, Andrew > > Yours, > Linus Walleij
On Fri, Oct 21, 2016 at 2:33 AM, Andrew Jeffery <andrew@aj.id.au> wrote: >> Patch applied for v4.10. >> (Tell me if I'm applying patches in wrong order or something, and >> I hope this doesn't clash with the fixes.) > > Both this patch and 8/8 functionally depend on 5/8. I fetched the > pinctrl tree to poke around but this patch didn't appear in any of the > updated branches, so I'm not sure whether we have the right ordering. > Without it we should hit build failures from missing macro definitions. > > Have you had a chance to look over patch 5/8? Joel wasn't keen on its > current form, so I would appreciate your input. Oops backed this patch out. Will look at 5/8. Appreciate if you repost the remaining patches in the series based on v4.9-rc2 once it's out, and I'll rebase the pinctrl tree onto that. Yours, Linus Walleij
On Mon, 2016-10-24 at 00:09 +0200, Linus Walleij wrote: > On Fri, Oct 21, 2016 at 2:33 AM, Andrew Jeffery <andrew@aj.id.au> wrote: > > > > > > > > > Patch applied for v4.10. > > > (Tell me if I'm applying patches in wrong order or something, and > > > I hope this doesn't clash with the fixes.) > > Both this patch and 8/8 functionally depend on 5/8. I fetched the > > pinctrl tree to poke around but this patch didn't appear in any of the > > updated branches, so I'm not sure whether we have the right ordering. > > Without it we should hit build failures from missing macro definitions. > > > > Have you had a chance to look over patch 5/8? Joel wasn't keen on its > > current form, so I would appreciate your input. > Oops backed this patch out. > > Will look at 5/8. > > Appreciate if you repost the remaining patches in the series based on > v4.9-rc2 once it's out, and I'll rebase the pinctrl tree onto that. > Will do! Andrew
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c index a21b071ff290..ceb13d4955cb 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c @@ -82,8 +82,8 @@ FUNC_GROUP_DECL(MDIO2, A3, D5); #define H19 13 #define H19_DESC SIG_DESC_SET(SCU80, 13) -SIG_EXPR_LIST_DECL_SINGLE(LPCPD, LPCPD, H19_DESC); -SIG_EXPR_LIST_DECL_SINGLE(LPCSMI, LPCSMI, H19_DESC); +SIG_EXPR_LIST_DECL_SINGLE(LPCPD, LPCPD, H19_DESC, SIG_DESC_BIT(SIORD30, 1, 0)); +SIG_EXPR_LIST_DECL_SINGLE(LPCSMI, LPCSMI, H19_DESC, SIG_DESC_SET(SIORD30, 1)); MS_PIN_DECL(H19, GPIOB5, LPCPD, LPCSMI); FUNC_GROUP_DECL(LPCPD, H19); diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h index 4384407d77fb..3a76d2c95584 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h @@ -266,6 +266,8 @@ #define SCUA8 0xA8 /* Multi-function Pin Control #9 */ #define HW_STRAP2 0xD0 /* Strapping */ +#define SIORD30 SIG_DESC_TO_REG(ASPEED_IP_SIO, 0x30) + /** * A signal descriptor, which describes the register, bits and the * enable/disable values that should be compared or written.
Two LPC-related signals in the AST2400 depend on state in the SuperIO IP block. Use the recently added infrastructure to capture this relationship. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 4 ++-- drivers/pinctrl/aspeed/pinctrl-aspeed.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-)