diff mbox

[U-Boot,2/2] armv8: ls1046aqds: add lpuart support

Message ID 1474957447-28103-1-git-send-email-shh.xie@gmail.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

shaohui xie Sept. 27, 2016, 6:24 a.m. UTC 
From: Shaohui Xie <Shaohui.Xie@nxp.com>

LPUART0 is used by default, and it's using platform clock, if a different
clock is preferred, user can define CONFIG_LPUART_CLK.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
---
 arch/arm/dts/Makefile                   |  1 +
 arch/arm/dts/fsl-ls1046a-qds-lpuart.dts | 16 ++++++++++
 arch/arm/dts/fsl-ls1046a-qds.dtsi       |  4 +++
 arch/arm/dts/fsl-ls1046a.dtsi           | 54 +++++++++++++++++++++++++++++++++
 board/freescale/ls1046aqds/ls1046aqds.c | 21 +++++++++++++
 configs/ls1046aqds_lpuart_defconfig     | 29 ++++++++++++++++++
 include/configs/ls1046aqds.h            |  8 +++++
 7 files changed, 133 insertions(+)
 create mode 100644 arch/arm/dts/fsl-ls1046a-qds-lpuart.dts
 create mode 100644 configs/ls1046aqds_lpuart_defconfig

Comments

York Sun Oct. 26, 2016, 5:19 p.m. UTC | #1 
On 09/26/2016 11:36 PM, shh.xie@gmail.com wrote:
> From: Shaohui Xie <Shaohui.Xie@nxp.com>
>
> LPUART0 is used by default, and it's using platform clock, if a different
> clock is preferred, user can define CONFIG_LPUART_CLK.

Shaohui,

You may have to choose another name for macro CONFIG_LPUART_CLK. We need 
to avoid using CONFIG_*. If this clock is fixed on the board, you can 
use SYS_FSL_* name space.

You can keep using CONFIG_LPUART for now, but eventually we will convert 
it to Kconfig option.

York
shaohui xie Oct. 27, 2016, 4:16 a.m. UTC | #2 
Hi York,

Thanks for reviewing!
Please see inline.

> -----Original Message-----
> From: york sun
> Sent: Thursday, October 27, 2016 1:19 AM
> To: shh.xie@gmail.com; u-boot@lists.denx.de
> Cc: S.H. Xie <shaohui.xie@nxp.com>
> Subject: Re: [PATCH 2/2] armv8: ls1046aqds: add lpuart support
> 
> On 09/26/2016 11:36 PM, shh.xie@gmail.com wrote:
> > From: Shaohui Xie <Shaohui.Xie@nxp.com>
> >
> > LPUART0 is used by default, and it's using platform clock, if a
> > different clock is preferred, user can define CONFIG_LPUART_CLK.
> 
> Shaohui,
> 
> You may have to choose another name for macro CONFIG_LPUART_CLK. We need
> to avoid using CONFIG_*. If this clock is fixed on the board, you can use SYS_FSL_*
> name space.
[S.H] I can drop the CONFIG_LPUART_CLK, it's not used on the QDS, I was thinking about 
to help user if their board uses different clock for LPUART and they don't want add code 
to calculate the frequency, they can just use a define.

> 
> You can keep using CONFIG_LPUART for now, but eventually we will convert it to
> Kconfig option.
[S.H] OK.

Thanks.
Shaohui
diff mbox

Patch

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 715e9bd..4a7d53b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -144,6 +144,7 @@  dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
 	fsl-ls1043a-qds-lpuart.dtb \
 	fsl-ls1043a-rdb.dtb \
 	fsl-ls1046a-qds-duart.dtb \
+	fsl-ls1046a-qds-lpuart.dtb \
 	fsl-ls1046a-rdb.dtb \
 	fsl-ls1012a-qds.dtb \
 	fsl-ls1012a-rdb.dtb \
diff --git a/arch/arm/dts/fsl-ls1046a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1046a-qds-lpuart.dts
new file mode 100644
index 0000000..21243d0
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1046a-qds-lpuart.dts
@@ -0,0 +1,16 @@ 
+/*
+ * Device Tree file for Freescale Layerscape-1046A family SoC.
+ *
+ * Copyright (C) 2016, Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+#include "fsl-ls1046a-qds.dtsi"
+
+/ {
+       chosen {
+               stdout-path = &lpuart0;
+       };
+};
diff --git a/arch/arm/dts/fsl-ls1046a-qds.dtsi b/arch/arm/dts/fsl-ls1046a-qds.dtsi
index c512293..a49ca08 100644
--- a/arch/arm/dts/fsl-ls1046a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1046a-qds.dtsi
@@ -75,3 +75,7 @@ 
 &duart1 {
 	status = "okay";
 };
+
+&lpuart0 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 87dd997..359a9d1 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -151,6 +151,60 @@ 
 			clocks = <&clockgen 4 0>;
 		};
 
+		lpuart0: serial@2950000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2950000 0x0 0x1000>;
+			interrupts = <0 48 0x4>;
+			clocks = <&clockgen 4 0>;
+			clock-names = "ipg";
+			status = "disabled";
+		};
+
+		lpuart1: serial@2960000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2960000 0x0 0x1000>;
+			interrupts = <0 49 0x4>;
+			clocks = <&clockgen 4 1>;
+			clock-names = "ipg";
+			status = "disabled";
+		};
+
+		lpuart2: serial@2970000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2970000 0x0 0x1000>;
+			interrupts = <0 50 0x4>;
+			clocks = <&clockgen 4 1>;
+			clock-names = "ipg";
+			status = "disabled";
+		};
+
+		lpuart3: serial@2980000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2980000 0x0 0x1000>;
+			interrupts = <0 51 0x4>;
+			clocks = <&clockgen 4 1>;
+			clock-names = "ipg";
+			status = "disabled";
+		};
+
+		lpuart4: serial@2990000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x2990000 0x0 0x1000>;
+			interrupts = <0 52 0x4>;
+			clocks = <&clockgen 4 1>;
+			clock-names = "ipg";
+			status = "disabled";
+		};
+
+		lpuart5: serial@29a0000 {
+			compatible = "fsl,ls1021a-lpuart";
+			reg = <0x0 0x29a0000 0x0 0x1000>;
+			interrupts = <0 53 0x4>;
+			clocks = <&clockgen 4 1>;
+			clock-names = "ipg";
+			status = "disabled";
+		};
+
 		qspi: quadspi@1550000 {
 			compatible = "fsl,vf610-qspi";
 			#address-cells = <1>;
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 8c18538..96d929d 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -120,6 +120,16 @@  unsigned long get_board_ddr_clk(void)
 	return 66666666;
 }
 
+#ifdef CONFIG_LPUART
+u32 get_lpuart_clk(void)
+{
+#ifdef CONFIG_LPUART_CLK
+	return CONFIG_LPUART_CLK;
+#endif
+	return gd->bus_clk;
+}
+#endif
+
 int select_i2c_ch_pca9547(u8 ch)
 {
 	int ret;
@@ -157,6 +167,9 @@  int board_early_init_f(void)
 	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
 	u32 usb_pwrfault;
 #endif
+#ifdef CONFIG_LPUART
+	u8 uart;
+#endif
 
 #ifdef CONFIG_SYS_I2C_EARLY_INIT
 	i2c_early_init_f();
@@ -175,6 +188,14 @@  int board_early_init_f(void)
 	out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault);
 #endif
 
+#ifdef CONFIG_LPUART
+	/* We use lpuart0 as system console */
+	uart = QIXIS_READ(brdcfg[14]);
+	uart &= ~CFG_UART_MUX_MASK;
+	uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT;
+	QIXIS_WRITE(brdcfg[14], uart);
+#endif
+
 	return 0;
 }
 
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
new file mode 100644
index 0000000..8e5b45d
--- /dev/null
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -0,0 +1,29 @@ 
+CONFIG_ARM=y
+CONFIG_TARGET_LS1046AQDS=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART"
+CONFIG_BOOTDELAY=10
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_DM_SPI=y
+CONFIG_SPI_FLASH=y
+CONFIG_FSL_DSPI=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 2e5c2f1..bc71770 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -132,6 +132,14 @@  unsigned long get_board_ddr_clk(void);
 #endif
 #endif
 
+/* LPUART */
+#ifdef CONFIG_LPUART
+#define CONFIG_LPUART_32B_REG
+#define CFG_UART_MUX_MASK	0x6
+#define CFG_UART_MUX_SHIFT	1
+#define CFG_LPUART_EN		0x2
+#endif
+
 /* SATA */
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI