From patchwork Mon Sep 26 07:30:23 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 674985 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sjFxs2bq8z9s1h for ; Mon, 26 Sep 2016 17:30:56 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=g2zXCrZU; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=OqRtZNPWgwFzoPoYSYfikgFZCFREZ2J8qzP5WOtOfW/xgrr0Ve y3B2yWl3Ch/yt/H8JC6Z+Sxm4wGhK3qJUd8s2wXcRISh1rKSz4Egp85fSXgsbndL gb4kn6Guc3oWGpa9Op0E/mgygMzWScMy094eyDbYBk9ytDn2iu40/yG8Y= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=RkyVz4axHBLMQ0ZCzz1j/XAbQkk=; b=g2zXCrZUy/ijN5woka2P EfTtVmW5wGQFTKQNWSupAlMy5DPjvSET2Z68GShJLZcI6w7HE87oRyKl1rYXF0/J doEKPWbbb5wT7H51hMar/7N7FuEzxPeoTrvGsXw1BUtmA0vGTN5msTRtPv/9FkGt N2hugiyYcdgudH1LqYnHkJE= Received: (qmail 56714 invoked by alias); 26 Sep 2016 07:30:47 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 56686 invoked by uid 89); 26 Sep 2016 07:30:45 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.1 required=5.0 tests=BAYES_00, KAM_ASCII_DIVIDERS, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=general-purpose, generalpurpose, HTo:U*clm X-HELO: mailapp01.imgtec.com Received: from mailapp02.imgtec.com (HELO mailapp01.imgtec.com) (217.156.133.132) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 26 Sep 2016 07:30:34 +0000 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id 12232D1A05AD5; Mon, 26 Sep 2016 08:30:30 +0100 (IST) Received: from [10.20.78.36] (10.20.78.36) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server id 14.3.294.0; Mon, 26 Sep 2016 08:30:31 +0100 Date: Mon, 26 Sep 2016 08:30:23 +0100 From: "Maciej W. Rozycki" To: Catherine Moore , Matthew Fortune CC: Subject: [PATCH] MIPS/doc: Fix `d' constraint description Message-ID: User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Revert a part of the `d' constraint documentation update made with commit 111868 ("Use define_constraint for MIPS"), , , which inadvertently made the registers covered to be referred to as "address" rather than "general-purpose" registers, and then further clarify the set of registers allowed with MIPS16 code. gcc/ * config/mips/constraints.md (d): Fix documentation. * doc/md.texi (Machine Constraints): Update accordingly. OK to apply? Maciej gcc-mips-d-constraint-doc.diff Index: gcc/gcc/config/mips/constraints.md =================================================================== --- gcc.orig/gcc/config/mips/constraints.md 2016-08-11 20:02:03.000000000 +0100 +++ gcc/gcc/config/mips/constraints.md 2016-09-26 07:59:05.542592370 +0100 @@ -20,8 +20,8 @@ ;; Register constraints (define_register_constraint "d" "TARGET_MIPS16 ? M16_REGS : GR_REGS" - "An address register. This is equivalent to @code{r} unless - generating MIPS16 code.") + "A general-purpose register. This is equivalent to @code{r} unless + generating MIPS16 code, in which case the MIPS16 register set is used.") (define_register_constraint "t" "T_REG" "@internal") Index: gcc/gcc/doc/md.texi =================================================================== --- gcc.orig/gcc/doc/md.texi 2016-08-11 20:02:07.000000000 +0100 +++ gcc/gcc/doc/md.texi 2016-09-26 07:59:13.283067222 +0100 @@ -2582,8 +2582,8 @@ A status register (@code{rmsr}, @code{$f @item MIPS---@file{config/mips/constraints.md} @table @code @item d -An address register. This is equivalent to @code{r} unless -generating MIPS16 code. +A general-purpose register. This is equivalent to @code{r} unless +generating MIPS16 code, in which case the MIPS16 register set is used. @item f A floating-point register (if available).