diff mbox

[PULL,16/26] linux-user: ppc64: set MSR_CM bit for BookE 2.06 MMU

Message ID c836112997e19966565cd6eb68e0836c8972720b.1474546244.git.riku.voipio@linaro.org
State New
Headers show

Commit Message

Riku Voipio Sept. 22, 2016, 12:13 p.m. UTC
From: Michael Walle <michael@walle.cc>

64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is
not set which enables the 64 bit mode for this MMU model. Memory addresses
are truncated to 32 bit, which results in "Invalid data memory access"
error messages. Fix it by setting the MSR_CM bit for this MMU model.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
---
 linux-user/main.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/linux-user/main.c b/linux-user/main.c
index 3ad70f8..2aeda8a 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -4615,10 +4615,11 @@  int main(int argc, char **argv, char **envp)
         int i;
 
 #if defined(TARGET_PPC64)
+        int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF;
 #if defined(TARGET_ABI32)
-        env->msr &= ~((target_ulong)1 << MSR_SF);
+        env->msr &= ~((target_ulong)1 << flag);
 #else
-        env->msr |= (target_ulong)1 << MSR_SF;
+        env->msr |= (target_ulong)1 << flag;
 #endif
 #endif
         env->nip = regs->nip;