@@ -2735,7 +2735,7 @@ static void
aarch64_layout_frame (void)
{
HOST_WIDE_INT offset = 0;
- int regno;
+ int regno, last_fp_reg = INVALID_REGNUM;
if (reload_completed && cfun->machine->frame.laid_out)
return;
@@ -2781,7 +2781,10 @@ aarch64_layout_frame (void)
for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
if (df_regs_ever_live_p (regno)
&& !call_used_regs[regno])
- cfun->machine->frame.reg_offset[regno] = SLOT_REQUIRED;
+ {
+ cfun->machine->frame.reg_offset[regno] = SLOT_REQUIRED;
+ last_fp_reg = regno;
+ }
if (cfun->machine->frame.emit_frame_chain)
{
@@ -2805,9 +2808,21 @@ aarch64_layout_frame (void)
offset += UNITS_PER_WORD;
}
+ HOST_WIDE_INT max_int_offset = offset;
+ offset = ROUND_UP (offset, STACK_BOUNDARY / BITS_PER_UNIT);
+ bool has_align_gap = offset != max_int_offset;
+
for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
if (cfun->machine->frame.reg_offset[regno] == SLOT_REQUIRED)
{
+ /* If there is an alignment gap between integer and fp callee-saves,
+ allocate the last fp register to it if possible. */
+ if (regno == last_fp_reg && has_align_gap && (offset & 8) == 0)
+ {
+ cfun->machine->frame.reg_offset[regno] = max_int_offset;
+ break;
+ }
+
cfun->machine->frame.reg_offset[regno] = offset;
if (cfun->machine->frame.wb_candidate1 == INVALID_REGNUM)
cfun->machine->frame.wb_candidate1 = regno;
ping From: Wilco Dijkstra Sent: 08 September 2016 14:35 To: GCC Patches Cc: nd Subject: [PATCH][AArch64] Align FP callee-saves If the number of integer callee-saves is odd, the FP callee-saves use 8-byte aligned LDP/STP. Since 16-byte alignment may be faster on some CPUs, align the FP callee-saves to 16 bytes and use the alignment gap for the last FP callee-save when possible. Besides slightly different offsets for FP callee-saves, the generated code doesn't change. Bootstrap and regression pass, OK for commit? ChangeLog: 2016-09-08 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.c (aarch64_layout_frame): Align FP callee-saves. --